创新的验证策略缩短了高端SPARC处理器的设计周期

33rd Design Automation Conference Proceedings, 1996 Pub Date : 1996-06-01 DOI:10.1109/DAC.1996.545592

V. Popescu, B. McNamara

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引用次数: 12

摘要

超标量处理器开发人员创造性地利用一流的设计验证工具来满足狭窄的市场窗口。加速仿真特别有用，因为它可以灵活地在设计周期的许多点上进行验证。一个独特的“验证背板”使得在整个设计周期中，每个设计团队成员都可以在任何抽象级别上进行连续的验证。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Innovative verification strategy reduces design cycle time for high-end SPARC processor

Superscalar processor developers are creatively leveraging best-in-class design verification tools to meet narrow market windows. Accelerated simulation is especially useful owing to its flexibility for verifying at many points during the design cycle. A unique "verification backplane" makes continuous verification at any level(s) of abstraction available to each design team member throughout the design cycle.

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33rd Design Automation Conference Proceedings, 1996

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