{"title":"500v n沟道igbt的电池优化","authors":"V. Parthasarathy, K. So, Z. Shen, T. Chow","doi":"10.1109/ISPSD.1994.583652","DOIUrl":null,"url":null,"abstract":"The impact of cell design on the safe operating area (SOA) of n-channel IGBTs is assessed. It is shown that the atomic layer lattice (ALL) cell geometry is important for improving the latchup dominated SOA of 500 V n-channel IGBTs. Experimental results for the latchup performance of n-channel ALL cell IGBTs, presented for the first time, show that even at a temperature of 200/spl deg/C these devices do not latch at all but are instead current limited. The experimental measurements and tradeoffs for the different cell geometries have been found to corroborate the trends in the numerical simulations.","PeriodicalId":405897,"journal":{"name":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"1994-05-31","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Cell optimization for 500 V n-channel IGBTs\",\"authors\":\"V. Parthasarathy, K. So, Z. Shen, T. Chow\",\"doi\":\"10.1109/ISPSD.1994.583652\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The impact of cell design on the safe operating area (SOA) of n-channel IGBTs is assessed. It is shown that the atomic layer lattice (ALL) cell geometry is important for improving the latchup dominated SOA of 500 V n-channel IGBTs. Experimental results for the latchup performance of n-channel ALL cell IGBTs, presented for the first time, show that even at a temperature of 200/spl deg/C these devices do not latch at all but are instead current limited. The experimental measurements and tradeoffs for the different cell geometries have been found to corroborate the trends in the numerical simulations.\",\"PeriodicalId\":405897,\"journal\":{\"name\":\"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-05-31\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.1994.583652\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 6th International Symposium on Power Semiconductor Devices and Ics","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.1994.583652","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The impact of cell design on the safe operating area (SOA) of n-channel IGBTs is assessed. It is shown that the atomic layer lattice (ALL) cell geometry is important for improving the latchup dominated SOA of 500 V n-channel IGBTs. Experimental results for the latchup performance of n-channel ALL cell IGBTs, presented for the first time, show that even at a temperature of 200/spl deg/C these devices do not latch at all but are instead current limited. The experimental measurements and tradeoffs for the different cell geometries have been found to corroborate the trends in the numerical simulations.
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