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引用次数: 0

摘要

提出了一种采用中心间隙设计的EE核心结构耦合电感,并将其应用于Boost-SEPIC交错(BSI)变换器。所提出的耦合电感可以在不等电压条件下集成三个电感。此外,由于该结构的特点,每个电感电流纹波被最小化,从而也降低了导通损耗。此外,电感器的整体尺寸显着减小。通过2kw样机验证了所提出的耦合电感器的性能。
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Boost-SEPIC Interleaved Converter with Integrated Magnetics
This paper proposes an EE core structure coupled inductor with center gap design, which is applied in the Boost-SEPIC interleaved (BSI) converter. The proposed coupled inductor can integrate all three inductors with unequal voltage conditions. In addition, owing to the characteristics of the structure, each inductor current ripple is minimized, thus, the conduction loss is reduced, as well. Also, the overall size of the inductor is decreased significantly. The performance of the proposed coupled inductor is verified with a 2-kW prototype.
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