A. Yamada, T. Yoshida, E. Holmann, T. Matsumura, S. Uramoto
{"title":"实时MPEG2编码和解码与双问题RISC处理器","authors":"A. Yamada, T. Yoshida, E. Holmann, T. Matsumura, S. Uramoto","doi":"10.1109/CICC.1997.606617","DOIUrl":null,"url":null,"abstract":"A single chip system for real-time encoding and decoding for MPEG2, except for motion estimation, can be created by integrating two 250 MHz dual issue RISC processor cores with a small dedicated hardware for the variable length encoding/decoding (VLC/VLD) and block loading process. The estimated area for the encoder, 27.7 mm/sup 2/ using a 0.3-micrometer CMOS process, is 20% smaller than that of the dedicated hardware approach. An approach that uses dual issue RISC processors has the advantage of a smaller chip area and also that of being very easy to program for multimedia applications.","PeriodicalId":111737,"journal":{"name":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","volume":"49 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1997-05-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Real-time MPEG2 encoding and decoding with a dual-issue RISC processor\",\"authors\":\"A. Yamada, T. Yoshida, E. Holmann, T. Matsumura, S. Uramoto\",\"doi\":\"10.1109/CICC.1997.606617\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A single chip system for real-time encoding and decoding for MPEG2, except for motion estimation, can be created by integrating two 250 MHz dual issue RISC processor cores with a small dedicated hardware for the variable length encoding/decoding (VLC/VLD) and block loading process. The estimated area for the encoder, 27.7 mm/sup 2/ using a 0.3-micrometer CMOS process, is 20% smaller than that of the dedicated hardware approach. An approach that uses dual issue RISC processors has the advantage of a smaller chip area and also that of being very easy to program for multimedia applications.\",\"PeriodicalId\":111737,\"journal\":{\"name\":\"Proceedings of CICC 97 - Custom Integrated Circuits Conference\",\"volume\":\"49 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1997-05-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of CICC 97 - Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1997.606617\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of CICC 97 - Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1997.606617","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Real-time MPEG2 encoding and decoding with a dual-issue RISC processor
A single chip system for real-time encoding and decoding for MPEG2, except for motion estimation, can be created by integrating two 250 MHz dual issue RISC processor cores with a small dedicated hardware for the variable length encoding/decoding (VLC/VLD) and block loading process. The estimated area for the encoder, 27.7 mm/sup 2/ using a 0.3-micrometer CMOS process, is 20% smaller than that of the dedicated hardware approach. An approach that uses dual issue RISC processors has the advantage of a smaller chip area and also that of being very easy to program for multimedia applications.