Binarized Neural Network with Stochastic Memristors

This paper proposes the analog hardware implementation of Binarized Neural Network (BNN). Most of the existing hardware implementations of neural networks do not consider the memristor variability issue and its effect on the overall system performance. In this work, we investigate the variability in memristive devices in crossbar dot product computation and leakage currents in the proposed BNN, and show how it effects the overall system performance.