16-43 GHz低噪声放大器,噪声系数2.5-4.0 dB

Zhe Chen, Hao Gao, D. Leenaerts, D. Milosevic, P. Baltus
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引用次数: 20

摘要

本文提出了一种工作频率为16至43 GHz的超宽带低噪声放大器(LNA),采用0.25 pm SiGe:C BiCMOS技术。在这个频段内,LNA通过双lc槽匹配实现了同时的低噪声性能(2.5-4.0 dB)和功率匹配(S11 <−10 dB)。测量到的最小噪声系数在26 GHz时为2.5 dB,在16 ~ 44 GHz范围内平均值为3.25(±0.75)dB。在26 GHz时,最佳增益为10.5 dB,增益带宽为3 dB,范围为16至43 GHz(90%分数带宽)。在16-43 GHz频段内,测量到的输入1-dB压缩点和输入IP3分别优于−8.5 dBm和1.8 dBm,总功耗为24 mW。
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A 16–43 GHz low-noise amplifer with 2.5–4.0 dB noise figure
This paper presents an ultra-broadband low-noise amplifier (LNA) operating from 16 to 43 GHz in a 0.25 pm SiGe:C BiCMOS technology. Across this band, the LNA achieves simultaneous low-noise performance (2.5–4.0 dB) and power matching (S11 < −10 dB) using dual-LC tank matching. The measured minimal noise figure is 2.5 dB at 26 GHz with an average value of 3.25 (±0.75) dB from 16 to 44 GHz. The best gain is 10.5 dB at 26 GHz with a 3-dB gain bandwidth from 16 to 43 GHz (90% fractional bandwidth). The measured input 1-dB compression point and input IP3 are better than −8.5 dBm and 1.8 dBm over the 16–43 GHz band, respectively, for a total power consumption of 24 mW.
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Copyright page Fractional-N DPLL based low power clocking architecture for 1–14 Gb/s multi-standard transmitter A 16–43 GHz low-noise amplifer with 2.5–4.0 dB noise figure A 12 bit 150 MS/s 1.5 mW SAR ADC with adaptive radix DAC in 40 nm CMOS A low-power calibration-free fractional-N digital PLL with high linear phase interpolator
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