Chien-Yu Lien, Yao-Chen Chuang, Yuan Yao, Edward Charn, Eric Chen
{"title":"嵌入式轨迹基板翘曲的基于块的有限元建模、仿真和优化","authors":"Chien-Yu Lien, Yao-Chen Chuang, Yuan Yao, Edward Charn, Eric Chen","doi":"10.1109/EPTC.2018.8654342","DOIUrl":null,"url":null,"abstract":"As the electronic devices getting lighter and smaller, a coreless substrate technology, called Embedded Trace Substrate (ETS) is developed to meet the market requirement. However, this design causes severe warpage due to the large difference in CTE (coefficient of thermal expansion) of buildup material and Cu plate. Recently, finite element analysis (FEA) is a popular and effective method used for substrate warpage prediction and mechanical studies. Manufacturers apply FEA simulation for substrate design improvements and provide substrate warpage that satisfying the customer’s specification. Nevertheless, the computational resources needed for high-fidelity simulation are extremely expensive and time-consuming. Hence the simulation study becomes a long and arduous task if it has to be performed many times, e.g., sensitivity analysis and warpage optimization.In this paper, we propose a new method for FEA modeling of mechanical behaviors of the substrate and present an optimization strategy for substrate warpage control. In the first step, the Gerber files of each layer of the substrate are converted into high-resolution bitmap images, and the copper area of each image is divided and scanned by a pre-sized block window. After that, the effective material properties for each block are calculated with a volume average micromechanics approach, and then all blocks are stacked-up to build a block-based analysis model for FEA simulation. As compared with conventional trace mapping simulation, the proposed method significantly decreases the demands of the computing resource. Besides, we gained accurate warpage prediction results as validated by a real substrate experiment. Finally, we presented an optimization strategy that manipulates the thickness of each layer for substrate warpage optimization in pre-processing steps of packaging. In conclusion, the results show that the methodology for substrate simulation in this paper is practical, effective, and costless.","PeriodicalId":360239,"journal":{"name":"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2018-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Block-Based Finite Element Modeling, Simulation, and Optimization of the Warpage of Embedded Trace Substrate\",\"authors\":\"Chien-Yu Lien, Yao-Chen Chuang, Yuan Yao, Edward Charn, Eric Chen\",\"doi\":\"10.1109/EPTC.2018.8654342\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As the electronic devices getting lighter and smaller, a coreless substrate technology, called Embedded Trace Substrate (ETS) is developed to meet the market requirement. However, this design causes severe warpage due to the large difference in CTE (coefficient of thermal expansion) of buildup material and Cu plate. Recently, finite element analysis (FEA) is a popular and effective method used for substrate warpage prediction and mechanical studies. Manufacturers apply FEA simulation for substrate design improvements and provide substrate warpage that satisfying the customer’s specification. Nevertheless, the computational resources needed for high-fidelity simulation are extremely expensive and time-consuming. Hence the simulation study becomes a long and arduous task if it has to be performed many times, e.g., sensitivity analysis and warpage optimization.In this paper, we propose a new method for FEA modeling of mechanical behaviors of the substrate and present an optimization strategy for substrate warpage control. In the first step, the Gerber files of each layer of the substrate are converted into high-resolution bitmap images, and the copper area of each image is divided and scanned by a pre-sized block window. After that, the effective material properties for each block are calculated with a volume average micromechanics approach, and then all blocks are stacked-up to build a block-based analysis model for FEA simulation. As compared with conventional trace mapping simulation, the proposed method significantly decreases the demands of the computing resource. Besides, we gained accurate warpage prediction results as validated by a real substrate experiment. Finally, we presented an optimization strategy that manipulates the thickness of each layer for substrate warpage optimization in pre-processing steps of packaging. In conclusion, the results show that the methodology for substrate simulation in this paper is practical, effective, and costless.\",\"PeriodicalId\":360239,\"journal\":{\"name\":\"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2018-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPTC.2018.8654342\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2018 IEEE 20th Electronics Packaging Technology Conference (EPTC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPTC.2018.8654342","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Block-Based Finite Element Modeling, Simulation, and Optimization of the Warpage of Embedded Trace Substrate
As the electronic devices getting lighter and smaller, a coreless substrate technology, called Embedded Trace Substrate (ETS) is developed to meet the market requirement. However, this design causes severe warpage due to the large difference in CTE (coefficient of thermal expansion) of buildup material and Cu plate. Recently, finite element analysis (FEA) is a popular and effective method used for substrate warpage prediction and mechanical studies. Manufacturers apply FEA simulation for substrate design improvements and provide substrate warpage that satisfying the customer’s specification. Nevertheless, the computational resources needed for high-fidelity simulation are extremely expensive and time-consuming. Hence the simulation study becomes a long and arduous task if it has to be performed many times, e.g., sensitivity analysis and warpage optimization.In this paper, we propose a new method for FEA modeling of mechanical behaviors of the substrate and present an optimization strategy for substrate warpage control. In the first step, the Gerber files of each layer of the substrate are converted into high-resolution bitmap images, and the copper area of each image is divided and scanned by a pre-sized block window. After that, the effective material properties for each block are calculated with a volume average micromechanics approach, and then all blocks are stacked-up to build a block-based analysis model for FEA simulation. As compared with conventional trace mapping simulation, the proposed method significantly decreases the demands of the computing resource. Besides, we gained accurate warpage prediction results as validated by a real substrate experiment. Finally, we presented an optimization strategy that manipulates the thickness of each layer for substrate warpage optimization in pre-processing steps of packaging. In conclusion, the results show that the methodology for substrate simulation in this paper is practical, effective, and costless.