{"title":"Elbrus多核处理器片上网络拓扑的性能分析","authors":"E. Kozhin, Alexey Kozhin, D. Shpagilev","doi":"10.1109/EnT50437.2020.9431279","DOIUrl":null,"url":null,"abstract":"Networks-on-chip play important role in modern multi-core processors linking all system components together. Their topologies determine a scalability of bandwidth and memory access time depending on the number of processor cores. In this work networks-on-chip with 2d mesh and 2d torus-mesh topologies for 8-, 12- and 16-core Elbrus processors were studied taking into account constraints of their physical design.","PeriodicalId":129694,"journal":{"name":"2020 International Conference Engineering and Telecommunication (En&T)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2020-11-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Performance Analysis of Network-on-Chip Topologies for Elbrus Multi-Core Processors\",\"authors\":\"E. Kozhin, Alexey Kozhin, D. Shpagilev\",\"doi\":\"10.1109/EnT50437.2020.9431279\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Networks-on-chip play important role in modern multi-core processors linking all system components together. Their topologies determine a scalability of bandwidth and memory access time depending on the number of processor cores. In this work networks-on-chip with 2d mesh and 2d torus-mesh topologies for 8-, 12- and 16-core Elbrus processors were studied taking into account constraints of their physical design.\",\"PeriodicalId\":129694,\"journal\":{\"name\":\"2020 International Conference Engineering and Telecommunication (En&T)\",\"volume\":\"12 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-11-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2020 International Conference Engineering and Telecommunication (En&T)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EnT50437.2020.9431279\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2020 International Conference Engineering and Telecommunication (En&T)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EnT50437.2020.9431279","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Performance Analysis of Network-on-Chip Topologies for Elbrus Multi-Core Processors
Networks-on-chip play important role in modern multi-core processors linking all system components together. Their topologies determine a scalability of bandwidth and memory access time depending on the number of processor cores. In this work networks-on-chip with 2d mesh and 2d torus-mesh topologies for 8-, 12- and 16-core Elbrus processors were studied taking into account constraints of their physical design.
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