VLSI互连布局对电迁移性能的影响

E.M. Atakov, T. Sriram, D. Dunnell, S. Pizzanello
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引用次数: 28

摘要

我们表征了多通孔触点的可靠性,以及触点电流方向对Ti-Al(Cu)-Ti-TiN线失效统计和短长度效应的影响。顶部和底部分流层的片电阻之间的显著差异导致电子向下流动方向的双峰失效时间分布。这也导致两个电流方向的短长度电阻饱和有显著差异。
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Effect of VLSI interconnect layout on electromigration performance
We characterized the reliability of multiple-via contacts, as well as the impact of the contact current direction on the failure statistics and short-length effects in Ti-Al(Cu)-Ti-TiN lines. A significant difference between the sheet resistances of the top and bottom shunting layers results in a bimodal failure time distribution for the downward electron flow direction. It also causes a significant difference in the short-length resistance saturation for the two current directions.
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