虚拟白板:利用对基于接口的设计和可执行规范的投资

Todd Hiers, Chunhua Hu, B. Karguth, Chuck Fuoco
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引用次数: 0

摘要

基于接口的设计方法和使用机器可读元数据的工具已经使用多年;然而,收集模块信息仍然需要大量的手工工作,特别是当SoC和模块共同设计时。这是一项耗时且容易出错的挑战,随着SoC复杂性的增加,这一挑战变得更加困难。用基于文档的“可执行规范”解决这些问题的各种努力只取得了有限的成功。通过完全使用特定于体系结构的基于web的可执行规范工具,可以利用生态系统中可用的元数据来极大地改进从规范到设计的过程。本文通过构建和使用架构感知工具来理解SoC结构,提出了一个关于子系统创建、SoC集成和SoC规范团队的统一集成环境的案例研究。一个现代的基于web的框架,而不是一个独立的工具,提供了内置的协作功能和一种直观地表示和操作数据的简单方法。可以强制执行关于这些连接的各种体系结构规则。连接结构(例如NoC)和其他特定于项目的基础设施可以按需配置和合成,并且由于公共环境,可以很容易地将其引入设计中。网络列表和其他连接性数据可以直接输入到自动化RTL生成过程中,或者作为负责实现的设计团队的参考。报告和自动软件生成满足设计验证和软件团队的需要。整个团队的生产力得到了极大的提高——基础设施的生产速度更快,所需的工程师更少。更短的修订周期也加快并简化了功能和性能测试反馈循环。
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Virtual white board: Leveraging investments in interface based design and executable specification
Interface-based design methodologies and tools using machine-readable metadata have been in use for many years; however, a lot of manual effort is still needed to gather module information, especially when the SoC and modules are being co-designed. It is a time-consuming and error prone challenge made more difficult by increasing SoC complexity. Various efforts to address these issues with document-based “executable specifications” met with only modest success. By committing fully to an architecture-specific web-based executable specification tool, the metadata available in the ecosystem could be leveraged to greatly improve the specification-to-design process. This paper presents a case study on a unified, integrated environment for subsystem creation, SoC integration, and SoC specification teams by building and using an architecture-aware tool to comprehend the SoC constructs. A modern web-based framework instead of a standalone tool gave built-in collaboration capabilities and an easy way to visually represent and manipulate data. Various architectural rules about these connections can be enforced. Connection fabrics (e.g. NoC) and other project-specific infrastructure can be configured and synthesized on demand and brought in to the design easily due to the common environment. Netlists and other connectivity data can be fed into automated RTL generation processes directly, or used as reference for design teams tasked with implementation. Reports and automated software generation satisfy the needs of the design verification and software teams. Overall team productivity is greatly enhanced — infrastructure is produced much more quickly with fewer engineers needed. The shorter revision cycle also speeds and simplifies functional and performance testing feedback loops.
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