A linear program driven scheduling and allocation method followed by an interconnect optimization algorithm

A new method for high-level logic synthesis is reported whose basic feature is the tight interaction and coupling of the scheduling and allocation phases providing a global direction to the synthesis. A linear-program-based allocation is proposed which uses multifunction-ALU cost estimation and iteratively drives a tree-search for scheduling. A new interconnect optimization algorithm is proposed. It is based on several interconnect transformations for multiplexer input collapsing and merging. Several other important synthesis aspects are included, e.g., register and interconnect bindings, operation chaining, and operation multicycling. The method has been implemented in C on a Sun 3/60 workstation.<>