一次性配置缓存调谐器,提高能源和性能

A. Gordon-Ross, Pablo Viana, F. Vahid, W. Najjar, E. Barros
{"title":"一次性配置缓存调谐器,提高能源和性能","authors":"A. Gordon-Ross, Pablo Viana, F. Vahid, W. Najjar, E. Barros","doi":"10.1109/DATE.2007.364686","DOIUrl":null,"url":null,"abstract":"We introduce a new non-intrusive on-chip cache-tuning hardware module capable of accurately predicting the best configuration of a configurable cache for an executing application. Previous dynamic cache tuning approaches change the cache configuration several times as part of the tuning search process, executing the application using inferior configurations and temporarily causing energy and performance overhead. The introduced tuner uses a different approach, which non-intrusively collects data on addresses issued by the microprocessor, analyzes that data to predict the best cache configuration, and then updates the cache to the new best configuration in \"one-shot\", without ever having to examine inferior configurations. The result is less energy and less performance overhead, meaning that cache tuning can be applied more frequently. We show through experiments that the one-shot cache tuner can reduce memory-access related energy for instructions by 35% and comes within 4% of a previous intrusive approach, and results in 4.6 times less energy overhead and a 7.7 times speedup in tuning time compared to a previous intrusive approach, at the main expense of 12% larger size","PeriodicalId":298961,"journal":{"name":"2007 Design, Automation & Test in Europe Conference & Exhibition","volume":"208 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-04-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"34","resultStr":"{\"title\":\"A One-Shot Configurable-Cache Tuner for Improved Energy and Performance\",\"authors\":\"A. Gordon-Ross, Pablo Viana, F. Vahid, W. Najjar, E. Barros\",\"doi\":\"10.1109/DATE.2007.364686\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We introduce a new non-intrusive on-chip cache-tuning hardware module capable of accurately predicting the best configuration of a configurable cache for an executing application. Previous dynamic cache tuning approaches change the cache configuration several times as part of the tuning search process, executing the application using inferior configurations and temporarily causing energy and performance overhead. The introduced tuner uses a different approach, which non-intrusively collects data on addresses issued by the microprocessor, analyzes that data to predict the best cache configuration, and then updates the cache to the new best configuration in \\\"one-shot\\\", without ever having to examine inferior configurations. The result is less energy and less performance overhead, meaning that cache tuning can be applied more frequently. We show through experiments that the one-shot cache tuner can reduce memory-access related energy for instructions by 35% and comes within 4% of a previous intrusive approach, and results in 4.6 times less energy overhead and a 7.7 times speedup in tuning time compared to a previous intrusive approach, at the main expense of 12% larger size\",\"PeriodicalId\":298961,\"journal\":{\"name\":\"2007 Design, Automation & Test in Europe Conference & Exhibition\",\"volume\":\"208 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-04-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"34\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 Design, Automation & Test in Europe Conference & Exhibition\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DATE.2007.364686\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 Design, Automation & Test in Europe Conference & Exhibition","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DATE.2007.364686","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 34

摘要

我们引入了一种新的非侵入式片上缓存调优硬件模块,能够准确预测执行应用程序的可配置缓存的最佳配置。以前的动态缓存调优方法在调优搜索过程中多次更改缓存配置,使用较差的配置执行应用程序,并暂时造成能量和性能开销。引入的调谐器使用了一种不同的方法,它非侵入性地收集微处理器发出的地址数据,分析该数据以预测最佳缓存配置,然后“一次性”将缓存更新为新的最佳配置,而不必检查较差的配置。其结果是更少的能量和更少的性能开销,这意味着可以更频繁地应用缓存调优。我们通过实验证明,一次性缓存调谐器可以将指令的内存访问相关能量减少35%,比以前的侵入式方法减少4%,并且与以前的侵入式方法相比,能量开销减少4.6倍,调优时间加快7.7倍,主要代价是尺寸增加12%
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A One-Shot Configurable-Cache Tuner for Improved Energy and Performance
We introduce a new non-intrusive on-chip cache-tuning hardware module capable of accurately predicting the best configuration of a configurable cache for an executing application. Previous dynamic cache tuning approaches change the cache configuration several times as part of the tuning search process, executing the application using inferior configurations and temporarily causing energy and performance overhead. The introduced tuner uses a different approach, which non-intrusively collects data on addresses issued by the microprocessor, analyzes that data to predict the best cache configuration, and then updates the cache to the new best configuration in "one-shot", without ever having to examine inferior configurations. The result is less energy and less performance overhead, meaning that cache tuning can be applied more frequently. We show through experiments that the one-shot cache tuner can reduce memory-access related energy for instructions by 35% and comes within 4% of a previous intrusive approach, and results in 4.6 times less energy overhead and a 7.7 times speedup in tuning time compared to a previous intrusive approach, at the main expense of 12% larger size
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