基于核心的单片系统设计

J. Henkel, F. Vahid
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引用次数: 1

摘要

集成能力的增长允许在单个芯片上集成完整的系统(SOC:片上系统)。由于传统的设计工具无法跟上这种快速增长的步伐,所谓的基于核心的设计方法对今天的系统设计师来说变得越来越重要。在这种情况下,核心可以是微处理器、控制器、多媒体应用程序等。核心通常分为三个层次:软核、硬核和硬核。软核是一种非合成的、通常与技术无关的电路HDL描述,而硬核是很容易合成和验证的。f核介于软核和硬核之间,具有软核和硬核的一些特性。通过将软核、软核和硬核混合组成系统,系统设计者能够在参数化、定制化和可重用性之间实现最佳折衷。因此,上市时间和系统成本可以大大减少。在这个四小时的教程中,作者将概述基于核心的设计方法,同时主要关注以下决定性的设计方面:芯片上的核心集成:a)集成是根据给定的设计目标使各种核心相互适应的过程,然后综合这些核心(如果适用),以获得单芯片解决方案。在其他步骤中,这个过程包括选择合适的接口,因为这个问题直接关系到设计目标的限制,如系统性能、芯片总面积、系统功耗、系统成本等。而芯片内接口(例如,在SOC和环境之间)则仅限于标准接口。本教程将给出一些集成过程的示例,重点介绍针对不同设计目标和约束的接口选择。Frank Vahid美国加州大学河滨分校计算机科学系,加州河滨分校9252 -0304,USA Vahid (ii, c.c.ucr.edu
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Core-based Design Of Systems On A Chip
The growth in integration capacity allows to integrate complete systems on one single chip (SOC: systems-on-a-chip). Since traditional design tools can not keep pace with this rapid growth, so-called core-based design methodologies become more and more important for today’s system designer. In this context, a core can be a microprocessor, a controller, a multimedia application, etc. Distinguished are often three levels of cores: soft, firm and hard cores. Whereas a soft core is a non-synthesized, often technology independent HDL description of a circuit, a hard core is readily synthesized and verified. A f i core is somewhere between and owns some peculiarities of soft cores and some of hard cores. By composing a system of a mixture of soft, f i and hard cores, the system designer is enabled to achieve the best compromise between parameterization, customization and re-usability. As a result, the time-to-market as well as system costs can be drastically reduced. In this four-hour tutorial the authors will give an overview of core-based design methodologies while mainly focussing on the following decisive design aspects: Integration of cores on a chip: a) Integration is the process of adapting various cores to each other according to given design goals and afterwards synthesizing these cores (if applicable) in order to obtain a singlechip-solution. Among other steps, this procedure involves the selection of appropriate interfaces since this matter is directly related to design goalslconstraints like system performance, total chip area, system power dissipation, system costs, etc. Whereas intra-chip interfaces (between the SOC and the environment, for example), is limited to standard interfaces. The tutorial will give some examples for the integration procedure with emphasize on interface selection for different design goalskonstraints. Frank Vahid Department of Computer Science University of Califbrnia Riverside Riverside, California 9252 1-0304, USA vahid(ii,cs.ucr.edu
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