{"title":"一个0.35-/spl mu/m CMOS低噪声VGA","authors":"Kyuyoung Chung, G. Han, Sungho Kang","doi":"10.1109/APASIC.2000.896894","DOIUrl":null,"url":null,"abstract":"This paper proposes a CMOS low noise variable gain amplifier (VGA). It describes the noise optimization method of the proposed VGA. The designed VGA provides of a 0 to 21.30 dB gain variation and with bandwidth of 49 MHz. The input reflected noise voltage is 4.84 nV/sqrt-Hz at 1 MHz and noise figure is 14.53 dB(Rs=50 /spl Omega/). The VGA was fabricated using 0.35-/spl mu/m CMOS technology.","PeriodicalId":313978,"journal":{"name":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","volume":"69 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"A 0.35-/spl mu/m CMOS low noise VGA\",\"authors\":\"Kyuyoung Chung, G. Han, Sungho Kang\",\"doi\":\"10.1109/APASIC.2000.896894\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper proposes a CMOS low noise variable gain amplifier (VGA). It describes the noise optimization method of the proposed VGA. The designed VGA provides of a 0 to 21.30 dB gain variation and with bandwidth of 49 MHz. The input reflected noise voltage is 4.84 nV/sqrt-Hz at 1 MHz and noise figure is 14.53 dB(Rs=50 /spl Omega/). The VGA was fabricated using 0.35-/spl mu/m CMOS technology.\",\"PeriodicalId\":313978,\"journal\":{\"name\":\"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)\",\"volume\":\"69 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-08-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/APASIC.2000.896894\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Second IEEE Asia Pacific Conference on ASICs. AP-ASIC 2000 (Cat. No.00EX434)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/APASIC.2000.896894","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper proposes a CMOS low noise variable gain amplifier (VGA). It describes the noise optimization method of the proposed VGA. The designed VGA provides of a 0 to 21.30 dB gain variation and with bandwidth of 49 MHz. The input reflected noise voltage is 4.84 nV/sqrt-Hz at 1 MHz and noise figure is 14.53 dB(Rs=50 /spl Omega/). The VGA was fabricated using 0.35-/spl mu/m CMOS technology.