基于高频的高k栅极电介质。hp45节点及以上的可扩展性

2006 International Workshop on Nano CMOS Pub Date : 1900-01-01 DOI:10.1109/IWNC.2006.4570984

Y. Nara, S. Inumiya, S. Kamiyama, Kunio Nakamura

{"title":"基于高频的高k栅极电介质。hp45节点及以上的可扩展性","authors":"Y. Nara, S. Inumiya, S. Kamiyama, Kunio Nakamura","doi":"10.1109/IWNC.2006.4570984","DOIUrl":null,"url":null,"abstract":"This proceeding we will discuss the scalability of Hf-based high-k gate dielectrics for hp45 node and beyond both with high-temperature gate-first integration and low-temperature gate-last integration. It describes the process optimization and metal gate MOSFET characteristics using gate-first integration with HfSiON and gate-last integration with HfO2.","PeriodicalId":356139,"journal":{"name":"2006 International Workshop on Nano CMOS","volume":"63 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Hf-based high-k gate dielectrics - Scalability for hp45 node and beyond -\",\"authors\":\"Y. Nara, S. Inumiya, S. Kamiyama, Kunio Nakamura\",\"doi\":\"10.1109/IWNC.2006.4570984\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This proceeding we will discuss the scalability of Hf-based high-k gate dielectrics for hp45 node and beyond both with high-temperature gate-first integration and low-temperature gate-last integration. It describes the process optimization and metal gate MOSFET characteristics using gate-first integration with HfSiON and gate-last integration with HfO2.\",\"PeriodicalId\":356139,\"journal\":{\"name\":\"2006 International Workshop on Nano CMOS\",\"volume\":\"63 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2006 International Workshop on Nano CMOS\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/IWNC.2006.4570984\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2006 International Workshop on Nano CMOS","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/IWNC.2006.4570984","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

摘要

在本程序中，我们将讨论Hf-based高k栅极电介质在hp45节点及以后节点的可扩展性，包括高温栅先集成和低温栅后集成。介绍了采用HfSiON先栅极集成和HfO2后栅极集成的工艺优化和金属栅极MOSFET特性。

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Hf-based high-k gate dielectrics - Scalability for hp45 node and beyond -

This proceeding we will discuss the scalability of Hf-based high-k gate dielectrics for hp45 node and beyond both with high-temperature gate-first integration and low-temperature gate-last integration. It describes the process optimization and metal gate MOSFET characteristics using gate-first integration with HfSiON and gate-last integration with HfO2.

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2006 International Workshop on Nano CMOS

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