冰水语言和翻译

P. A. D. Powell, M. Elmasry
{"title":"冰水语言和翻译","authors":"P. A. D. Powell, M. Elmasry","doi":"10.1109/DAC.1984.1585780","DOIUrl":null,"url":null,"abstract":"A symbolic circuit design language for describing the topology and topography of a VLSI design in a simple and hierarchical manner is described. The language was intended to provide a simple manner of structuring a VLSI design, based on the Mead and Conway design methodology. Cells may be constructed from other cells and technology specific devices. Terminals for interconnecting cells are explicitly named, and may be accessed in a symbolic fashion from the language. The restriction of methods of interconnecting cells to simple abutment and specific wiring provides a simple and clear method of maintaining the connectivity of the design. The methodology proposed obviates the need for overly complex geometrical design rules. Other tools will provide design compaction, mask generation, and circuit extraction using a technology specific database and the design description.","PeriodicalId":188431,"journal":{"name":"21st Design Automation Conference Proceedings","volume":"39 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1984-06-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"The Icewater Language and Interpreter\",\"authors\":\"P. A. D. Powell, M. Elmasry\",\"doi\":\"10.1109/DAC.1984.1585780\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A symbolic circuit design language for describing the topology and topography of a VLSI design in a simple and hierarchical manner is described. The language was intended to provide a simple manner of structuring a VLSI design, based on the Mead and Conway design methodology. Cells may be constructed from other cells and technology specific devices. Terminals for interconnecting cells are explicitly named, and may be accessed in a symbolic fashion from the language. The restriction of methods of interconnecting cells to simple abutment and specific wiring provides a simple and clear method of maintaining the connectivity of the design. The methodology proposed obviates the need for overly complex geometrical design rules. Other tools will provide design compaction, mask generation, and circuit extraction using a technology specific database and the design description.\",\"PeriodicalId\":188431,\"journal\":{\"name\":\"21st Design Automation Conference Proceedings\",\"volume\":\"39 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1984-06-25\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"21st Design Automation Conference Proceedings\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DAC.1984.1585780\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"21st Design Automation Conference Proceedings","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DAC.1984.1585780","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 9

摘要

描述了一种符号电路设计语言,用于以简单和分层的方式描述VLSI设计的拓扑和地形。该语言旨在提供一种基于Mead和Conway设计方法构建VLSI设计的简单方式。细胞可以由其他细胞和技术特定设备构建。用于互连单元的终端被显式地命名,并且可以从语言中以符号方式访问。将连接单元的方法限制为简单的基台和特定的布线,为保持设计的连接性提供了一种简单而明确的方法。所提出的方法避免了过于复杂的几何设计规则的需要。其他工具将使用特定技术数据库和设计描述提供设计压缩、掩模生成和电路提取。
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The Icewater Language and Interpreter
A symbolic circuit design language for describing the topology and topography of a VLSI design in a simple and hierarchical manner is described. The language was intended to provide a simple manner of structuring a VLSI design, based on the Mead and Conway design methodology. Cells may be constructed from other cells and technology specific devices. Terminals for interconnecting cells are explicitly named, and may be accessed in a symbolic fashion from the language. The restriction of methods of interconnecting cells to simple abutment and specific wiring provides a simple and clear method of maintaining the connectivity of the design. The methodology proposed obviates the need for overly complex geometrical design rules. Other tools will provide design compaction, mask generation, and circuit extraction using a technology specific database and the design description.
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