{"title":"用于可重构计算的硬件/软件协同调试","authors":"K. Tomko, A. Tiwari","doi":"10.1109/HLDVT.2000.889560","DOIUrl":null,"url":null,"abstract":"Application development environments for reconfigurable computing are the topic of many research and development projects yet few comprehensive debugging tools have been provided. In this paper we describe a debugging environmental use with FPGA accelerated applications which supports co-validation and co-testing of the software and hardware portions of the application. Our Co-debugging environment supports in-situ debugging utilizing the readback capabilities of FPGA chips for fast recreation and isolation of a fault. We show that this environment has the potential to reduce application debug times from hours to just a few minutes.","PeriodicalId":113229,"journal":{"name":"Proceedings IEEE International High-Level Design Validation and Test Workshop (Cat. No.PR00786)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-11-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"20","resultStr":"{\"title\":\"Hardware/software co-debugging for reconfigurable computing\",\"authors\":\"K. Tomko, A. Tiwari\",\"doi\":\"10.1109/HLDVT.2000.889560\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Application development environments for reconfigurable computing are the topic of many research and development projects yet few comprehensive debugging tools have been provided. In this paper we describe a debugging environmental use with FPGA accelerated applications which supports co-validation and co-testing of the software and hardware portions of the application. Our Co-debugging environment supports in-situ debugging utilizing the readback capabilities of FPGA chips for fast recreation and isolation of a fault. We show that this environment has the potential to reduce application debug times from hours to just a few minutes.\",\"PeriodicalId\":113229,\"journal\":{\"name\":\"Proceedings IEEE International High-Level Design Validation and Test Workshop (Cat. No.PR00786)\",\"volume\":\"41 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-11-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"20\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings IEEE International High-Level Design Validation and Test Workshop (Cat. No.PR00786)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HLDVT.2000.889560\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings IEEE International High-Level Design Validation and Test Workshop (Cat. No.PR00786)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HLDVT.2000.889560","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Hardware/software co-debugging for reconfigurable computing
Application development environments for reconfigurable computing are the topic of many research and development projects yet few comprehensive debugging tools have been provided. In this paper we describe a debugging environmental use with FPGA accelerated applications which supports co-validation and co-testing of the software and hardware portions of the application. Our Co-debugging environment supports in-situ debugging utilizing the readback capabilities of FPGA chips for fast recreation and isolation of a fault. We show that this environment has the potential to reduce application debug times from hours to just a few minutes.