用于可重构计算的硬件/软件协同调试

K. Tomko, A. Tiwari
{"title":"用于可重构计算的硬件/软件协同调试","authors":"K. Tomko, A. Tiwari","doi":"10.1109/HLDVT.2000.889560","DOIUrl":null,"url":null,"abstract":"Application development environments for reconfigurable computing are the topic of many research and development projects yet few comprehensive debugging tools have been provided. In this paper we describe a debugging environmental use with FPGA accelerated applications which supports co-validation and co-testing of the software and hardware portions of the application. Our Co-debugging environment supports in-situ debugging utilizing the readback capabilities of FPGA chips for fast recreation and isolation of a fault. We show that this environment has the potential to reduce application debug times from hours to just a few minutes.","PeriodicalId":113229,"journal":{"name":"Proceedings IEEE International High-Level Design Validation and Test Workshop (Cat. No.PR00786)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-11-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"20","resultStr":"{\"title\":\"Hardware/software co-debugging for reconfigurable computing\",\"authors\":\"K. Tomko, A. Tiwari\",\"doi\":\"10.1109/HLDVT.2000.889560\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Application development environments for reconfigurable computing are the topic of many research and development projects yet few comprehensive debugging tools have been provided. In this paper we describe a debugging environmental use with FPGA accelerated applications which supports co-validation and co-testing of the software and hardware portions of the application. Our Co-debugging environment supports in-situ debugging utilizing the readback capabilities of FPGA chips for fast recreation and isolation of a fault. We show that this environment has the potential to reduce application debug times from hours to just a few minutes.\",\"PeriodicalId\":113229,\"journal\":{\"name\":\"Proceedings IEEE International High-Level Design Validation and Test Workshop (Cat. No.PR00786)\",\"volume\":\"41 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-11-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"20\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings IEEE International High-Level Design Validation and Test Workshop (Cat. No.PR00786)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HLDVT.2000.889560\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings IEEE International High-Level Design Validation and Test Workshop (Cat. No.PR00786)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HLDVT.2000.889560","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 20

摘要

用于可重构计算的应用程序开发环境是许多研究和开发项目的主题,但很少提供全面的调试工具。在本文中,我们描述了一个FPGA加速应用程序的调试环境,它支持应用程序的软件和硬件部分的共同验证和共同测试。我们的协同调试环境支持现场调试,利用FPGA芯片的读回功能快速重建和隔离故障。我们展示了这个环境有可能将应用程序调试时间从几个小时减少到几分钟。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Hardware/software co-debugging for reconfigurable computing
Application development environments for reconfigurable computing are the topic of many research and development projects yet few comprehensive debugging tools have been provided. In this paper we describe a debugging environmental use with FPGA accelerated applications which supports co-validation and co-testing of the software and hardware portions of the application. Our Co-debugging environment supports in-situ debugging utilizing the readback capabilities of FPGA chips for fast recreation and isolation of a fault. We show that this environment has the potential to reduce application debug times from hours to just a few minutes.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
期刊最新文献
Toward automated abstraction for protocols on branching networks Silicon debug of a co-processor array for video applications Use of constraint solving in order to generate test vectors for behavioral validation An RT-level fault model with high gate level correlation Compilation-based software performance estimation for system level design
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1