M. Vamshi Krishna, J. Xie, W. M. Lim, M. Do, K. Yeo, C. Boon
{"title":"低功耗全可编程1MHz分辨率2.4GHz CMOS锁相环频率合成器","authors":"M. Vamshi Krishna, J. Xie, W. M. Lim, M. Do, K. Yeo, C. Boon","doi":"10.1109/BIOCAS.2007.4463340","DOIUrl":null,"url":null,"abstract":"This paper presents a low power, high resolution 2.4 GHz CMOS frequency synthesizer for low power wireless LAN applications. The PLL frequency synthesizer consists of a fully programmable frequency divider with a resolution of 1 MHz in the range of 2.4 GHz-2.484 GHz.The measured results showed that the programmable divider consumes 946 uA and Quadrature VCO consumes 1.57 mA and produces output swing of 650-700 mVpp. The complete synthesizer is designed using the Chartered RF 0.18 um process and synthesizer consumes 2.7 mA.","PeriodicalId":273819,"journal":{"name":"2007 IEEE Biomedical Circuits and Systems Conference","volume":"17 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"15","resultStr":"{\"title\":\"A Low Power Fully Programmable 1MHz Resolution 2.4GHz CMOS PLL Frequency Synthesizer\",\"authors\":\"M. Vamshi Krishna, J. Xie, W. M. Lim, M. Do, K. Yeo, C. Boon\",\"doi\":\"10.1109/BIOCAS.2007.4463340\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents a low power, high resolution 2.4 GHz CMOS frequency synthesizer for low power wireless LAN applications. The PLL frequency synthesizer consists of a fully programmable frequency divider with a resolution of 1 MHz in the range of 2.4 GHz-2.484 GHz.The measured results showed that the programmable divider consumes 946 uA and Quadrature VCO consumes 1.57 mA and produces output swing of 650-700 mVpp. The complete synthesizer is designed using the Chartered RF 0.18 um process and synthesizer consumes 2.7 mA.\",\"PeriodicalId\":273819,\"journal\":{\"name\":\"2007 IEEE Biomedical Circuits and Systems Conference\",\"volume\":\"17 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"15\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2007 IEEE Biomedical Circuits and Systems Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/BIOCAS.2007.4463340\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2007 IEEE Biomedical Circuits and Systems Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/BIOCAS.2007.4463340","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A Low Power Fully Programmable 1MHz Resolution 2.4GHz CMOS PLL Frequency Synthesizer
This paper presents a low power, high resolution 2.4 GHz CMOS frequency synthesizer for low power wireless LAN applications. The PLL frequency synthesizer consists of a fully programmable frequency divider with a resolution of 1 MHz in the range of 2.4 GHz-2.484 GHz.The measured results showed that the programmable divider consumes 946 uA and Quadrature VCO consumes 1.57 mA and produces output swing of 650-700 mVpp. The complete synthesizer is designed using the Chartered RF 0.18 um process and synthesizer consumes 2.7 mA.