干蚀刻原位难熔发射极触点技术中的高性能110nm InGaAs/InP dhbt

V. Jain, E. Lobisser, A. Baraskar, B. Thibeault, M. Rodwell, Z. Griffith, M. Urteaga, S. Bartsch, D. Loubychev, A. Snyder, Y. Wu, J. Fastenau, W.K. Liu
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引用次数: 4

摘要

我们报道了110 nm InP/In0.53Ga0.47As/InP双异质结双极晶体管(DHBT),其同时ft/fmax为465/660 GHz,工作功率密度超过50 mW/µm2。据我们所知,这是III-V型DHBT报道的最小结宽。窄的110 nm发射极结允许器件在高电压和高电流密度(Je)下同时偏置,峰值射频性能为41 mW/µm2 (Je = 23.6 mA/µm2, Vce = 1.75 V)。器件将低接触电阻,难熔,原位Mo发射极接触到高掺杂,再生的InGaAs帽。开发了干蚀刻W/Ti0.1W0.9发射极金属工艺,展示了高发射极良率和亚100 nm结的可扩展性。先前报道的涉及Ti/Ti0.1W0.9金属的干式蚀刻工艺由于高金属应力导致极低的发射极产率而无法缩放到180 nm以下的结宽[1,2]。本文报道的发射极金属触点宽度为100nm,发射极-基极结宽度为110nm。采用晶圆通反射线(TRL)校准结构测量140 - 180 GHz器件的射频性能。
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High performance 110 nm InGaAs/InP DHBTs in dry-etched in-situ refractory emitter contact technology
We report a 110 nm InP/In0.53Ga0.47As/InP double heterojunction bipolar transistor (DHBT) demonstrating a simultaneous ft/fmax of 465/660 GHz and operating at power densities in excess of 50 mW/µm2. To our knowledge this is the smallest junction width reported for a III–V DHBT. The narrow 110 nm emitter junction permits the devices to be biased simultaneously at high voltages and high current densities (Je) with peak RF performance at 41 mW/µm2 (Je = 23.6 mA/µm2, Vce = 1.75 V). Devices incorporate low contact resistance, refractory, in-situ Mo emitter contact to a highly doped, regrown InGaAs cap. A low stress, sputter deposited, refractory, dry-etched W/Ti0.1W0.9 emitter metal process was developed demonstrating both high emitter yield and scalability to sub-100 nm junctions. Previously reported dry etch processes involving Ti/Ti0.1W0.9 metals could not be scaled below 180 nm junction widths due to high metal stress resulting in very low emitter yield [1, 2]. The emitter metal contacts reported here are 100 nm wide and the emitter-base junction width is 110 nm. On-wafer Through-Reflect-Line (TRL) calibration structures were used to measure the RF performance of devices from 140 – 180 GHz.
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