用于SSO模拟的增强的电流镜像

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems Pub Date : 2012-10-01 DOI:10.1109/EPEPS.2012.6457858

B. Young

{"title":"用于SSO模拟的增强的电流镜像","authors":"B. Young","doi":"10.1109/EPEPS.2012.6457858","DOIUrl":null,"url":null,"abstract":"Current mirrors are an established technique for reducing memory requirements and run time in Spice-based bus simulations with many simultaneously switching outputs (SSO). Mismatched delayss can reduce accuracy, and a current mirror bus architecture enhanced with a bridge circuit is shown to restore accuracy with mismatched package delays.","PeriodicalId":188377,"journal":{"name":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","volume":"20 6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"An enhanced current mirror for SSO simulation\",\"authors\":\"B. Young\",\"doi\":\"10.1109/EPEPS.2012.6457858\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Current mirrors are an established technique for reducing memory requirements and run time in Spice-based bus simulations with many simultaneously switching outputs (SSO). Mismatched delayss can reduce accuracy, and a current mirror bus architecture enhanced with a bridge circuit is shown to restore accuracy with mismatched package delays.\",\"PeriodicalId\":188377,\"journal\":{\"name\":\"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems\",\"volume\":\"20 6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEPS.2012.6457858\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEPS.2012.6457858","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

摘要

电流镜像是一种成熟的技术，用于减少基于spice的总线仿真中的内存需求和运行时间，该仿真具有许多同时切换输出(SSO)。不匹配的延迟会降低精度，并且通过桥接电路增强的电流镜像总线架构可以在不匹配的包延迟下恢复精度。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

An enhanced current mirror for SSO simulation

Current mirrors are an established technique for reducing memory requirements and run time in Spice-based bus simulations with many simultaneously switching outputs (SSO). Mismatched delayss can reduce accuracy, and a current mirror bus architecture enhanced with a bridge circuit is shown to restore accuracy with mismatched package delays.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

2012 IEEE 21st Conference on Electrical Performance of Electronic Packaging and Systems

自引率

0.00%

发文量