Pai-Ying Liao, S. Alajlouni, M. Si, Zhuocheng Zhang, Zehao Lin, J. Noh, Calista Wilk, A. Shakouri, P. Ye
{"title":"兼容beol的顶门控原子薄ALD In2O3场效应管的热研究","authors":"Pai-Ying Liao, S. Alajlouni, M. Si, Zhuocheng Zhang, Zehao Lin, J. Noh, Calista Wilk, A. Shakouri, P. Ye","doi":"10.1109/vlsitechnologyandcir46769.2022.9830279","DOIUrl":null,"url":null,"abstract":"In this work, we investigate the thermal issues of top-gated (TG), ultrathin, atomic layer deposition (ALD) grown, back-end-of-line (BEOL) compatible indium oxide (In2O3) transistors by observation and visualization of the self-heating effect (SHE) using high-resolution thermo-reflectance (TR) measurement. SHE is alleviated by highly resistive silicon (HR Si) substrate with high thermal conductivity (κSi). The increased temperature (ΔT) of the devices on HR Si substrate is roughly 6 times lower than that with SiO2/Si substrate. Furthermore, thermal simulation with a finite-element method exhibits exceptional agreement to ΔT distribution with experimental results. By thermal engineering, TG In2O3 transistors with channel thickness (Tch) of 1.8 nm and high drain current (ID) up to 2.65 mA/µm are achieved.","PeriodicalId":332454,"journal":{"name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"Thermal Studies of BEOL-compatible Top-Gated Atomically Thin ALD In2O3 FETs\",\"authors\":\"Pai-Ying Liao, S. Alajlouni, M. Si, Zhuocheng Zhang, Zehao Lin, J. Noh, Calista Wilk, A. Shakouri, P. Ye\",\"doi\":\"10.1109/vlsitechnologyandcir46769.2022.9830279\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this work, we investigate the thermal issues of top-gated (TG), ultrathin, atomic layer deposition (ALD) grown, back-end-of-line (BEOL) compatible indium oxide (In2O3) transistors by observation and visualization of the self-heating effect (SHE) using high-resolution thermo-reflectance (TR) measurement. SHE is alleviated by highly resistive silicon (HR Si) substrate with high thermal conductivity (κSi). The increased temperature (ΔT) of the devices on HR Si substrate is roughly 6 times lower than that with SiO2/Si substrate. Furthermore, thermal simulation with a finite-element method exhibits exceptional agreement to ΔT distribution with experimental results. By thermal engineering, TG In2O3 transistors with channel thickness (Tch) of 1.8 nm and high drain current (ID) up to 2.65 mA/µm are achieved.\",\"PeriodicalId\":332454,\"journal\":{\"name\":\"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830279\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830279","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Thermal Studies of BEOL-compatible Top-Gated Atomically Thin ALD In2O3 FETs
In this work, we investigate the thermal issues of top-gated (TG), ultrathin, atomic layer deposition (ALD) grown, back-end-of-line (BEOL) compatible indium oxide (In2O3) transistors by observation and visualization of the self-heating effect (SHE) using high-resolution thermo-reflectance (TR) measurement. SHE is alleviated by highly resistive silicon (HR Si) substrate with high thermal conductivity (κSi). The increased temperature (ΔT) of the devices on HR Si substrate is roughly 6 times lower than that with SiO2/Si substrate. Furthermore, thermal simulation with a finite-element method exhibits exceptional agreement to ΔT distribution with experimental results. By thermal engineering, TG In2O3 transistors with channel thickness (Tch) of 1.8 nm and high drain current (ID) up to 2.65 mA/µm are achieved.