静态CMOS组合电路同时开关功率和地噪声的估计

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC Pub Date : 1994-02-28 DOI:10.1109/EDTC.1994.326804

A. Abderrahman, B. Kaminska, Y. Savaria

{"title":"静态CMOS组合电路同时开关功率和地噪声的估计","authors":"A. Abderrahman, B. Kaminska, Y. Savaria","doi":"10.1109/EDTC.1994.326804","DOIUrl":null,"url":null,"abstract":"Digital and mixed circuits performance are affected and limited by the simultaneous switching power and ground noise. For accurately selecting the number of power/ground pins to overcome switching noise, it is very important to accurately estimate the worst case simultaneous switching power and ground noise. In this paper we propose a heuristic that helps to estimate this worst case.<<ETX>>","PeriodicalId":244297,"journal":{"name":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-02-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Estimation of simultaneous switching power and ground noise of static CMOS combinational circuits\",\"authors\":\"A. Abderrahman, B. Kaminska, Y. Savaria\",\"doi\":\"10.1109/EDTC.1994.326804\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Digital and mixed circuits performance are affected and limited by the simultaneous switching power and ground noise. For accurately selecting the number of power/ground pins to overcome switching noise, it is very important to accurately estimate the worst case simultaneous switching power and ground noise. In this paper we propose a heuristic that helps to estimate this worst case.<<ETX>>\",\"PeriodicalId\":244297,\"journal\":{\"name\":\"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-02-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EDTC.1994.326804\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EDTC.1994.326804","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 1

摘要

数字电路和混合电路的性能受到同时存在的开关功率和地噪声的影响和限制。为了准确地选择电源/地引脚数以克服开关噪声，准确地估计最坏情况下的同时开关功率和地噪声是非常重要的。在本文中，我们提出了一种启发式方法来帮助估计这种最坏情况

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文

微信好友朋友圈 QQ好友复制链接

本刊更多论文

Estimation of simultaneous switching power and ground noise of static CMOS combinational circuits

Digital and mixed circuits performance are affected and limited by the simultaneous switching power and ground noise. For accurately selecting the number of power/ground pins to overcome switching noise, it is very important to accurately estimate the worst case simultaneous switching power and ground noise. In this paper we propose a heuristic that helps to estimate this worst case.<>

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC

自引率

0.00%

发文量

期刊最新文献

Application of simple genetic algorithms to sequential circuit test generation Efficient implementations of self-checking multiply and divide arrays A reduced-swing data transmission scheme for resistive bus lines in VLSIs Genesis: a behavioral synthesis system for hierarchical testability Nondeterministic finite-state machines and sequential don't cares