{"title":"为提高成品率而设计的可修复和可完全诊断的折叠pla","authors":"C. Wey, Jyhyeung Ding, Tsin-Yuan Chang","doi":"10.1145/123186.123295","DOIUrl":null,"url":null,"abstract":"A fault-tolerant design of repairable and fully diagnosable folded PLA is presented, in which the defects can be repaired without reconfiguring the external routing. The design achieves a full diagnosability of single and multiple stuck-at, bridging, and crosspoint faults, and leads to a significant yield improvement. The physical layout and floor plan are also provided to assess the chip area.<<ETX>>","PeriodicalId":118552,"journal":{"name":"27th ACM/IEEE Design Automation Conference","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Design of repairable and fully diagnosable folded PLAs for yield enhancement\",\"authors\":\"C. Wey, Jyhyeung Ding, Tsin-Yuan Chang\",\"doi\":\"10.1145/123186.123295\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A fault-tolerant design of repairable and fully diagnosable folded PLA is presented, in which the defects can be repaired without reconfiguring the external routing. The design achieves a full diagnosability of single and multiple stuck-at, bridging, and crosspoint faults, and leads to a significant yield improvement. The physical layout and floor plan are also provided to assess the chip area.<<ETX>>\",\"PeriodicalId\":118552,\"journal\":{\"name\":\"27th ACM/IEEE Design Automation Conference\",\"volume\":\"16 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-06-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"27th ACM/IEEE Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/123186.123295\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"27th ACM/IEEE Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/123186.123295","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of repairable and fully diagnosable folded PLAs for yield enhancement
A fault-tolerant design of repairable and fully diagnosable folded PLA is presented, in which the defects can be repaired without reconfiguring the external routing. The design achieves a full diagnosability of single and multiple stuck-at, bridging, and crosspoint faults, and leads to a significant yield improvement. The physical layout and floor plan are also provided to assess the chip area.<>
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