Yong-Ju Kim, Jong-Ho Kang, KunWoo-park, J. Wee, K. Hong
{"title":"高速数字系统配电网设计的综合方法","authors":"Yong-Ju Kim, Jong-Ho Kang, KunWoo-park, J. Wee, K. Hong","doi":"10.1109/EPEP.2003.1250016","DOIUrl":null,"url":null,"abstract":"In this letter, a noble methodology for design of the power distribution networks is presented. The proposed method is based on the PDN(power distribution network) synthesis with the path-based equivalent circuit (PBEC) model. From this approach, on-chip decoupling capacitance and effective inductance of the package as well as the amount, number and location of off-chip decoupling capacitors can directly be determined. The result of the proposed method was verified through comparison with that of PEEC (Partial Elements Equivalent Circuit).","PeriodicalId":254477,"journal":{"name":"Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2003-12-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Synthesis method for design of power distribution network in high-speed digital systems\",\"authors\":\"Yong-Ju Kim, Jong-Ho Kang, KunWoo-park, J. Wee, K. Hong\",\"doi\":\"10.1109/EPEP.2003.1250016\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this letter, a noble methodology for design of the power distribution networks is presented. The proposed method is based on the PDN(power distribution network) synthesis with the path-based equivalent circuit (PBEC) model. From this approach, on-chip decoupling capacitance and effective inductance of the package as well as the amount, number and location of off-chip decoupling capacitors can directly be determined. The result of the proposed method was verified through comparison with that of PEEC (Partial Elements Equivalent Circuit).\",\"PeriodicalId\":254477,\"journal\":{\"name\":\"Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710)\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2003-12-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/EPEP.2003.1250016\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Electrical Performance of Electrical Packaging (IEEE Cat. No. 03TH8710)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/EPEP.2003.1250016","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Synthesis method for design of power distribution network in high-speed digital systems
In this letter, a noble methodology for design of the power distribution networks is presented. The proposed method is based on the PDN(power distribution network) synthesis with the path-based equivalent circuit (PBEC) model. From this approach, on-chip decoupling capacitance and effective inductance of the package as well as the amount, number and location of off-chip decoupling capacitors can directly be determined. The result of the proposed method was verified through comparison with that of PEEC (Partial Elements Equivalent Circuit).