基于verilog系统的数字集成电路设计的开发环境

L. Kohútka, V. Stopjaková
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引用次数: 0

摘要

提出了一种新的软件工具ChipDE,它代表了一种基于SystemVerilog语言的数字集成电路(IC)描述的高效开发环境。提出的ChipDE工具提供了各种功能,如文本编辑、文件/项目浏览器、语法高亮、代码自动完成、转到定义、框图绘制、从框图生成SystemVerilog代码和从SystemVerilog代码生成框图。所提出的ChipDE工具可以显著缩短数字集成电路的开发时间,利用方框图丰富文档,提高设计的数字集成电路和系统的整体可读性和可维护性。此外,所提出的软件解决方案可用于教学目的,因为该工具降低了学习SystemVerilog语言的难度和时间,并有助于学习数字IC设计的基本设计概念和实际示例。
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ChipDE - A Development Environment for System Verilog-Based Digital IC Design
A new software tool - ChipDE, which represents an efficient development environment for description of digital integrated circuits (IC) based on SystemVerilog language is presented. The proposed ChipDE tool provides various features, such as text editing, file/project browser, syntax-highlighting, code auto-completion, go to definition, block diagram drawing, generation of SystemVerilog code from block diagrams and generation of block diagrams from SystemVerilog code. The proposed ChipDE tool can significantly reduce the digital IC development time, enrich the documentation using the block diagrams and improve the overall readability and maintainability of designed digital integrated circuits and systems. Moreover, the proposed software solution can be used for didactic purposes, since the tool reduces the difficulty and time needed to learn SystemVerilog language, and helps to learn the basic design concepts and practical examples of digital IC designs.
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