{"title":"一种高CHCS/CLCS、速度快、保持时间长的反转型铁电电容存储器及其1kbit交叉棒阵列的实验演示","authors":"Zuopu Zhou, Jiao Leming, Jiuren Zhou, Zijie Zheng, Yue Chen, Kaizhen Han, Yuye Kang, Xiao-Qing Gong","doi":"10.1109/vlsitechnologyandcir46769.2022.9830291","DOIUrl":null,"url":null,"abstract":"By introducing a heavily doped region in the metal-ferroelectric-semiconductor (MFS) structure, for the first time, we report an inversion-type ferroelectric capacitive memory (FCM) device which simultaneously achieves (1) high (×125) CHCS/CLCS ratio, (2) 10-year retention under 85 ℃, (3) multi-state operation, and (4) improved write speed in nanosecond range. Integrating the devices on SOI substrates, we also realize the world’s first 1 kbit inversion-type FCM crossbar array and demonstrate successful read/write operation with a specially-designed array drive and test system.","PeriodicalId":332454,"journal":{"name":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2022-06-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"7","resultStr":"{\"title\":\"Experimental Demonstration of An Inversion-Type Ferroelectric Capacitive Memory and its 1 kbit Crossbar Array Featuring High CHCS/CLCS, Fast Speed, and Long Retention\",\"authors\":\"Zuopu Zhou, Jiao Leming, Jiuren Zhou, Zijie Zheng, Yue Chen, Kaizhen Han, Yuye Kang, Xiao-Qing Gong\",\"doi\":\"10.1109/vlsitechnologyandcir46769.2022.9830291\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"By introducing a heavily doped region in the metal-ferroelectric-semiconductor (MFS) structure, for the first time, we report an inversion-type ferroelectric capacitive memory (FCM) device which simultaneously achieves (1) high (×125) CHCS/CLCS ratio, (2) 10-year retention under 85 ℃, (3) multi-state operation, and (4) improved write speed in nanosecond range. Integrating the devices on SOI substrates, we also realize the world’s first 1 kbit inversion-type FCM crossbar array and demonstrate successful read/write operation with a specially-designed array drive and test system.\",\"PeriodicalId\":332454,\"journal\":{\"name\":\"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2022-06-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"7\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830291\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/vlsitechnologyandcir46769.2022.9830291","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Experimental Demonstration of An Inversion-Type Ferroelectric Capacitive Memory and its 1 kbit Crossbar Array Featuring High CHCS/CLCS, Fast Speed, and Long Retention
By introducing a heavily doped region in the metal-ferroelectric-semiconductor (MFS) structure, for the first time, we report an inversion-type ferroelectric capacitive memory (FCM) device which simultaneously achieves (1) high (×125) CHCS/CLCS ratio, (2) 10-year retention under 85 ℃, (3) multi-state operation, and (4) improved write speed in nanosecond range. Integrating the devices on SOI substrates, we also realize the world’s first 1 kbit inversion-type FCM crossbar array and demonstrate successful read/write operation with a specially-designed array drive and test system.
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