{"title":"一种改进高压单位增益缓冲器的实现","authors":"M. Jankowski","doi":"10.23919/MIXDES52406.2021.9497633","DOIUrl":null,"url":null,"abstract":"This paper presents modification of a specialized high-voltage unity-gain buffer related to its physical implementation in a selected high-voltage SOI technology process. Several additional safety devices are required for non- destructive power-up, normal operation and power-down phases of this buffer function cycle. The modifications are largely related to intricacies of the buffer topology, as low- and high-voltage MOS devices are used there in close cooperation. Impact of the implementation-related changes on the buffer operation capabilities is presented and discussed.","PeriodicalId":375541,"journal":{"name":"2021 28th International Conference on Mixed Design of Integrated Circuits and System","volume":"35 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2021-06-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Implementation of a Modified High-Voltage Unity-Gain Buffer\",\"authors\":\"M. Jankowski\",\"doi\":\"10.23919/MIXDES52406.2021.9497633\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents modification of a specialized high-voltage unity-gain buffer related to its physical implementation in a selected high-voltage SOI technology process. Several additional safety devices are required for non- destructive power-up, normal operation and power-down phases of this buffer function cycle. The modifications are largely related to intricacies of the buffer topology, as low- and high-voltage MOS devices are used there in close cooperation. Impact of the implementation-related changes on the buffer operation capabilities is presented and discussed.\",\"PeriodicalId\":375541,\"journal\":{\"name\":\"2021 28th International Conference on Mixed Design of Integrated Circuits and System\",\"volume\":\"35 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2021-06-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2021 28th International Conference on Mixed Design of Integrated Circuits and System\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.23919/MIXDES52406.2021.9497633\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2021 28th International Conference on Mixed Design of Integrated Circuits and System","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.23919/MIXDES52406.2021.9497633","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Implementation of a Modified High-Voltage Unity-Gain Buffer
This paper presents modification of a specialized high-voltage unity-gain buffer related to its physical implementation in a selected high-voltage SOI technology process. Several additional safety devices are required for non- destructive power-up, normal operation and power-down phases of this buffer function cycle. The modifications are largely related to intricacies of the buffer topology, as low- and high-voltage MOS devices are used there in close cooperation. Impact of the implementation-related changes on the buffer operation capabilities is presented and discussed.