在1.5GHz的亚阈值区域的0.4V 790μw CMOS低噪声放大器

Amin Zafarian, Iraj Kalali Fard, A. Golmakani, J. Shirazi
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引用次数: 9

摘要

提出了一种采用折叠级联结构的1.5GHz超低功耗、供电电压为0.4V的全集成低噪声放大器。该电路采用TSMC 0.18 μm CMOS工艺设计,所有晶体管均偏置于亚阈值区域。通过在该结构中使用所提出的增益增强电路和使用正向体偏置技术,与类似结构相比,实现了非常高的性能。LNA的功率增益为14.7dB,噪声系数为2.9dB,直流功耗仅为790μW。电路在工作频率内输入输出阻抗匹配良好,在电路的全带宽内输入输出隔离度低于-33dB。
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A 0.4V 790μw CMOS low noise amplifier in sub-threshold region at 1.5GHz
A fully integrated low-noise amplifier (LNA) with 0.4V supply voltage and ultra low power consumption at 1.5GHz by folded cascode structure is presented. The proposed LNA is designed in a TSMC 0.18 μm CMOS technology, in which all transistors are biased in subthreshold region. Through the use of proposed circuit for gain enhancement in this structure and using forward body bias technique, a very high figure of merit is achieved, in comparison to similar structures. The LNA provides a power gain of 14.7dB with a noise figure of 2.9dB while consuming only 790μW dc power. Also, impedance matching of input and output of the circuit in its operating frequency is desirable and in the whole bandwidth of the circuit, input and output isolation is below -33dB.
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