先进射频等离子体系统梯度下降阻抗匹配速度的改进

Dongwon Shin, Sang Jeen Hong
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引用次数: 0

摘要

等离子体工艺广泛应用于集成电路的制造,以满足新技术要求的更小、更快、更强大的电路。在半导体制造中,动态随机存取存储器和三维NAND闪存都需要高性能的半导体设备。为了提高射频阻抗匹配的速度,本文提出了一种计算等离子体腔负载阻抗的方法。为了计算可变分量的目标值,我们采用了阻抗匹配单元的输入阻抗和可变分量的复阻抗。此外,通过机器学习的梯度下降法自动调整内部参数,提高了阻抗匹配的精度。新的匹配方法实现了快速的匹配时间和高效率的匹配轨迹。避免了在匹配过程中反射功率的增加引起的等离子体不稳定性,避免了在特定区域出现明显的匹配延迟,这是传统匹配算法的缺点。这些优点有望大大扩展传统阻抗匹配的新等离子体工艺的发展。
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Improved impedance matching speed with gradient descent for advanced RF plasma system
Plasma processes are widely used in the fabrication of integrated circuits for the smaller, faster, more powerful circuits demanded by new technology. High-performance semiconductor equipment is required for dynamic random-access memory and three-dimensional NAND flash memory in semiconductor manufacturing. To enhance the speed of RF impedance matching, this paper proposes a method for calculating the load impedance of the plasma chamber. To calculate the target value of the variable components, we employ the input impedance of the impedance-matching unit and the complex impedances of the variable components. In addition, the internal parameters are automatically tuned through the gradient-descent method of machine learning, which improves the accuracy of impedance matching. The new matching method achieved a fast matching time and high efficiency of the matching trajectories. Moreover, it avoids the increase of the reflected power during the matching process, which causes plasma instability, and prohibits significant matching delay in a specific area, which disadvantages the conventional matching algorithm. These advantages are expected to significantly expand the development of new plasma processes from that of conventional impedance matching.
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