Byeong-Chan Lee, Jeong-Taek Lim, Jae-Eun Lee, Jae-Hyeok Song, Jeong-Taek Son, Joon-Hyung Kim, Min-Seok Baek, Jong-Seong Park, Eun-Gyu Lee, Choul-Young Kim
{"title":"w波段CMOS威尔金森功率分压器","authors":"Byeong-Chan Lee, Jeong-Taek Lim, Jae-Eun Lee, Jae-Hyeok Song, Jeong-Taek Son, Joon-Hyung Kim, Min-Seok Baek, Jong-Seong Park, Eun-Gyu Lee, Choul-Young Kim","doi":"10.5515/kjkiees.2023.34.9.700","DOIUrl":null,"url":null,"abstract":"This paper presents the design of W-band Wilkinson power divider using 65 nm bulk CMOS process. In this design, the quarter-wavelength (λ/4) transmission line was replaced with a lumped element, and a CRC structure was applied to the isolation network circuit. In addition, a metal wall was installed between the two output lines to enhance isolation. This power divider had a maximum insertion loss of 1.93 dB and a minimum isolation of 13.3 dB in the 75~110 GHz band. The return loss was more than 7.2 dB, and the size of the core was 0.2×0.12 mm2.","PeriodicalId":55817,"journal":{"name":"Journal of the Korean Institute of Electromagnetic Engineering and Science","volume":"376 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2023-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"W-Band CMOS Wilkinson Power Divider\",\"authors\":\"Byeong-Chan Lee, Jeong-Taek Lim, Jae-Eun Lee, Jae-Hyeok Song, Jeong-Taek Son, Joon-Hyung Kim, Min-Seok Baek, Jong-Seong Park, Eun-Gyu Lee, Choul-Young Kim\",\"doi\":\"10.5515/kjkiees.2023.34.9.700\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design of W-band Wilkinson power divider using 65 nm bulk CMOS process. In this design, the quarter-wavelength (λ/4) transmission line was replaced with a lumped element, and a CRC structure was applied to the isolation network circuit. In addition, a metal wall was installed between the two output lines to enhance isolation. This power divider had a maximum insertion loss of 1.93 dB and a minimum isolation of 13.3 dB in the 75~110 GHz band. The return loss was more than 7.2 dB, and the size of the core was 0.2×0.12 mm2.\",\"PeriodicalId\":55817,\"journal\":{\"name\":\"Journal of the Korean Institute of Electromagnetic Engineering and Science\",\"volume\":\"376 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of the Korean Institute of Electromagnetic Engineering and Science\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.5515/kjkiees.2023.34.9.700\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of the Korean Institute of Electromagnetic Engineering and Science","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.5515/kjkiees.2023.34.9.700","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper presents the design of W-band Wilkinson power divider using 65 nm bulk CMOS process. In this design, the quarter-wavelength (λ/4) transmission line was replaced with a lumped element, and a CRC structure was applied to the isolation network circuit. In addition, a metal wall was installed between the two output lines to enhance isolation. This power divider had a maximum insertion loss of 1.93 dB and a minimum isolation of 13.3 dB in the 75~110 GHz band. The return loss was more than 7.2 dB, and the size of the core was 0.2×0.12 mm2.