{"title":"Y2O3栅极介质顶门控碳纳米管薄膜晶体管的负偏置温度不稳定性","authors":"Yuwei Wang;Sha Wang;Huaidong Ye;Wenhao Zhang;Li Xiang","doi":"10.1109/TDMR.2023.3322157","DOIUrl":null,"url":null,"abstract":"The negative bias temperature instability (NBTI) of the top-gated p-type carbon nanotube (CNT) thin film transistors (TFTs) with yttrium oxide (Y2O3) dielectric is investigated under different gate bias, stress and relaxation time for the first time. Positive and fast reversible threshold voltage shift along with significant degradation of subthreshold and trans-conductance are observed. The effects of ambient condition are basically excluded by experimental results, and the NBTI in these CNT devices is believed to be primarily due to the generation of considerable interface traps and border traps near dielectric/CNT interface, highlighting the importance of the interface optimization for CNT TFTs in the future. The hysteresis characteristics during stress and recovery are discussed as well, to further explore the stress-induced-traps properties. All these results may provide a reference for the future study on the gate oxide reliability of CNT TFTs with Y2O3 dielectric.","PeriodicalId":448,"journal":{"name":"IEEE Transactions on Device and Materials Reliability","volume":"23 4","pages":"571-576"},"PeriodicalIF":2.5000,"publicationDate":"2023-10-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Negative Bias Temperature Instability in Top-Gated Carbon Nanotube Thin Film Transistors With Y2O3 Gate Dielectric\",\"authors\":\"Yuwei Wang;Sha Wang;Huaidong Ye;Wenhao Zhang;Li Xiang\",\"doi\":\"10.1109/TDMR.2023.3322157\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The negative bias temperature instability (NBTI) of the top-gated p-type carbon nanotube (CNT) thin film transistors (TFTs) with yttrium oxide (Y2O3) dielectric is investigated under different gate bias, stress and relaxation time for the first time. Positive and fast reversible threshold voltage shift along with significant degradation of subthreshold and trans-conductance are observed. The effects of ambient condition are basically excluded by experimental results, and the NBTI in these CNT devices is believed to be primarily due to the generation of considerable interface traps and border traps near dielectric/CNT interface, highlighting the importance of the interface optimization for CNT TFTs in the future. The hysteresis characteristics during stress and recovery are discussed as well, to further explore the stress-induced-traps properties. All these results may provide a reference for the future study on the gate oxide reliability of CNT TFTs with Y2O3 dielectric.\",\"PeriodicalId\":448,\"journal\":{\"name\":\"IEEE Transactions on Device and Materials Reliability\",\"volume\":\"23 4\",\"pages\":\"571-576\"},\"PeriodicalIF\":2.5000,\"publicationDate\":\"2023-10-05\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Device and Materials Reliability\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10272672/\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Device and Materials Reliability","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10272672/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Negative Bias Temperature Instability in Top-Gated Carbon Nanotube Thin Film Transistors With Y2O3 Gate Dielectric
The negative bias temperature instability (NBTI) of the top-gated p-type carbon nanotube (CNT) thin film transistors (TFTs) with yttrium oxide (Y2O3) dielectric is investigated under different gate bias, stress and relaxation time for the first time. Positive and fast reversible threshold voltage shift along with significant degradation of subthreshold and trans-conductance are observed. The effects of ambient condition are basically excluded by experimental results, and the NBTI in these CNT devices is believed to be primarily due to the generation of considerable interface traps and border traps near dielectric/CNT interface, highlighting the importance of the interface optimization for CNT TFTs in the future. The hysteresis characteristics during stress and recovery are discussed as well, to further explore the stress-induced-traps properties. All these results may provide a reference for the future study on the gate oxide reliability of CNT TFTs with Y2O3 dielectric.
期刊介绍：
The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.
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