A new digital background calibration technique for pipeline analog to digital converters using decision points of the voltage transfer characteristics

A new technique is introduced for digital background calibration in pipeline analog to digital converters (ADCs). The technique is based on the decision points of the voltage transfer characteristic (VTC) of the pipeline stages, which means the residual VTC is used to estimate the output code of the decision points. By applying the proposed technique, the capacitor mismatch error, the residual amplifier error, and the nonlinearity errors are corrected. To attain proper decision points, the sub-ADC is considered and one of its threshold levels is changed. The mathematical relations of the errors are extracted, and then by applying error coefficients to the final digital outputs, the pipeline ACD is calibrated. This method has a simple digital logic and does not require a particular analog circuit. The proposed technique is applied to the first five stages of a 12-bit 100 MS/s pipeline ADC, and about 0.7 × 10⁶ samples are used. The results show that the presented technique improves the signal-to-noise and distortion ratio (SNDR) and spurious-free dynamic range (SFDR) from 34.1 and 35.1 dB to 69.2 and 77.6 dB, respectively.