使用准浮动自级联输出级的低电压高带宽 FVF 电流镜

IF 1.2 4区 工程技术 Q4 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE Analog Integrated Circuits and Signal Processing Pub Date : 2023-12-16 DOI:10.1007/s10470-023-02205-4
Narsaiah Domala, G. Sasikala, Nikhil Raj
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引用次数: 0

摘要

摘要 要实现低功耗应用,需要性能理想的电流镜。本文提出的 FVF 电流镜具有高带宽、低输入和升压输出电阻。在输入端使用翻转电压跟随器确认了低电压操作。此外,在输入端还创建了一个局部负反馈回路,从而降低了输入节点电阻,使其值低于 1 欧姆。输出级由稳压级联和超级级联拓扑组成,由使用自级联结构实现的反相放大器驱动,以改善输出电阻。不过,拟议的设计没有使用传统的栅极驱动自级联,而是使用了基于准浮动栅极 MOS 晶体管的结构,从而进一步提高了输出电阻和带宽。拟议的电流镜在 0-1000 µA 范围内工作时误差最小。拟议电路的带宽范围为千兆赫,即 3.1 GHz。输入端的电阻值为 0.407 Ω,而输出端的电阻值提高到了千兆欧姆,即 86 GΩ。稳定性和鲁棒性分析是通过温度、工艺转角和蒙特卡罗运行来完成的。整个设计是在 HSpice 的帮助下,使用联电 0.18 微米技术的 MOSFET 模型在 0.5 V 电压下完成的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

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Low voltage high bandwidth FVF current mirror using quasi floating self-cascode output stage

Current mirrors with ideal performance are widely in demand for realizing low power applications. In this paper, an FVF current mirror is proposed to have high bandwidth, low input, and boosted output resistance. The low voltage operation is confirmed using flipped voltage follower at the input. Also at the input, a local negative feedback loop is created which reduces the input node resistance and the achieved value ranges below an ohm. The output stage consists of a regulated cascode and a super cascode topology which is driven by an inverting amplifier realized using a self-cascode structure to improve the output resistance. However, instead of using the traditional gate-driven self-cascode, the proposed design uses its quasi-floating gate MOS transistor-based structure which further improves the output resistance and bandwidth. The proposed current mirror operates with minimum error in the range of 0–1000 µA. The bandwidth of the proposed circuit ranges in gigahertz which is 3.1 GHz. The resistance at the input is found as 0.407 Ω whereas the output has boosted resistance to a Giga ohm value which is 86 GΩ. The stability and robustness analysis is done via temperature, process corners and Monte Carlo runs. The complete design is done using the MOSFET model of UMC in 0.18-micron technology at \(\pm\) 0.5 V with the help of HSpice.

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来源期刊
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing 工程技术-工程:电子与电气
CiteScore
0.30
自引率
7.10%
发文量
141
审稿时长
7.3 months
期刊介绍: Analog Integrated Circuits and Signal Processing is an archival peer reviewed journal dedicated to the design and application of analog, radio frequency (RF), and mixed signal integrated circuits (ICs) as well as signal processing circuits and systems. It features both new research results and tutorial views and reflects the large volume of cutting-edge research activity in the worldwide field today. A partial list of topics includes analog and mixed signal interface circuits and systems; analog and RFIC design; data converters; active-RC, switched-capacitor, and continuous-time integrated filters; mixed analog/digital VLSI systems; wireless radio transceivers; clock and data recovery circuits; and high speed optoelectronic circuits and systems.
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