用于超低压静电放电保护的双孔工艺新型双向 DTSCR

IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Solid-state Electronics Pub Date : 2024-02-01 Epub Date: 2023-12-20 DOI:10.1016/j.sse.2023.108847
Xiaofeng Gu , Jian Xu , Hailian Liang , Junliang Liu , Dong Wang , Shurong Dong , Wen Lei , Juin J. Liou
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引用次数: 0

摘要

通过在具有单向静电放电保护功能的二极管触发硅控整流器(DTSCR)中嵌入额外的 NPN 型和 PNP 型双极结晶体管,我们提出并实现了一种新型双向 DTSCR(DDTSCR),它采用 0.18 微米 CMOS 工艺中的双阱工艺,可提供高效的超低压静电放电保护。与传统的 DTSCR 相比,拟议的 DDTSCR 的失效电流从 4.5 A 增加到 5.6 A,成功通过了 8 kV 人体模型和 650 V 机器模型的 ESD 级别测试。由于其独特的结构设计和金属布线,DDTSCR 的 ESD 保护效率是 DTSCR 的两倍。为了验证不同工艺下 ESD 保护性能的稳定性,DDTSCR-E 分别采用 0.18 微米 BCD、0.18 微米和 21 纳米 CMOS 工艺制造。在工艺迁移过程中,发现 DDTSCR-E 的触发电压比其他 ESD 特性更稳定。高效率、强大的 ESD 鲁棒性和稳定的工艺迁移使所提出的 DDTSCR 成为超低电压集成电路中一种很有前途的 ESD 保护器件。
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A novel dual-directional DTSCR in twin-well process for ultra-low-voltage ESD protection

By embedding additional NPN- and PNP- type bipolar junction transistors into a diode-triggered silicon-controlled rectifier (DTSCR) with single-directional ESD protection, we propose and implement a novel dual-directional DTSCR (DDTSCR) by using the twin-well process in a 0.18-µm CMOS process that provides highly efficient ultra-low-voltage ESD protection. Compared to conventional DTSCRs, the failure current of the proposed DDTSCR increases from 4.5 A to 5.6 A, successfully passing the ESD level tests of human body model at 8 kV and machine model at 650 V. Owing to its unique structural design and metal routing, the ESD protection efficiency of the DDTSCR is twice that of the DTSCR. By adopting a new E-shaped layout (DDTSCR-E), the failure current under positive stress can increase further to 6.6 A. In order to verify the ESD protection performance stabilization with different processes, the DDTSCR-E is fabricated in the 0.18-µm BCD, 0.18-µm and 21-nm CMOS processes, respectively. The trigger voltage of DDTSCR-E is found more stable than other ESD characteristics during the process migration. The high efficiency, the strong ESD robustness and the stable process migration make the proposed DDTSCR a promising ESD protection device for ultra-low-voltage integrated circuits.

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来源期刊
Solid-state Electronics
Solid-state Electronics 物理-工程:电子与电气
CiteScore
3.00
自引率
5.90%
发文量
212
审稿时长
3 months
期刊介绍: It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.
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