Chan-Yeong Park, Se-Hyeong Lee, So-Young Bak, Dongki Baek, Hyeongrok Jang, Jinwoo Lee, Moonsuk Yi
{"title":"通过改变超循环和生长温度提高多层 ZnO/SnO2 薄膜晶体管的性能","authors":"Chan-Yeong Park, Se-Hyeong Lee, So-Young Bak, Dongki Baek, Hyeongrok Jang, Jinwoo Lee, Moonsuk Yi","doi":"10.1016/j.sse.2024.108920","DOIUrl":null,"url":null,"abstract":"<div><p>The performance of conventional ZnSnO (ZTO) amorphous oxide semiconductor thin-film transistors deposited by atomic layer deposition was optimized at annealing temperatures greater than 500 °C, which is higher than the application temperature of flexible substrates (400 °C). Therefore, we deposited a ZTO thin film as a multilayered ZnO/SnO<sub>2</sub> structure to lower the process temperature to below 400 °C. To optimize the performance of the device with a multilayered structure, we examined the effects of cycles and growth temperatures. Finally, after performing 6 supercycles with 10 cycles of ZnO and 20 cycles of SnO<sub>2</sub>, at a growth temperature of 180 °C and annealing at 350 °C for 1 h, the device achieved a saturation carrier mobility of 8.09 cm<sup>2</sup>/V·s, threshold voltage of 1.6 V, subthreshold swing of 0.58 V/dec, and on–off current ratio of 2.63 × 10<sup>7</sup>. The optimized multilayer-structured device performed better than the ZTO device annealed at 350 °C for 1 h, and even outperformed the device annealed at 500 °C for 1 h. X-ray photoelectron spectroscopy analysis was also conducted to analyze the properties of conventional ZTO and multilayered ZnO/SnO<sub>2</sub> thin films.</p></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"216 ","pages":"Article 108920"},"PeriodicalIF":1.4000,"publicationDate":"2024-03-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Performance improvement of multilayered ZnO/SnO2 thin-film transistors by varying supercycles and growth temperatures\",\"authors\":\"Chan-Yeong Park, Se-Hyeong Lee, So-Young Bak, Dongki Baek, Hyeongrok Jang, Jinwoo Lee, Moonsuk Yi\",\"doi\":\"10.1016/j.sse.2024.108920\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>The performance of conventional ZnSnO (ZTO) amorphous oxide semiconductor thin-film transistors deposited by atomic layer deposition was optimized at annealing temperatures greater than 500 °C, which is higher than the application temperature of flexible substrates (400 °C). Therefore, we deposited a ZTO thin film as a multilayered ZnO/SnO<sub>2</sub> structure to lower the process temperature to below 400 °C. To optimize the performance of the device with a multilayered structure, we examined the effects of cycles and growth temperatures. Finally, after performing 6 supercycles with 10 cycles of ZnO and 20 cycles of SnO<sub>2</sub>, at a growth temperature of 180 °C and annealing at 350 °C for 1 h, the device achieved a saturation carrier mobility of 8.09 cm<sup>2</sup>/V·s, threshold voltage of 1.6 V, subthreshold swing of 0.58 V/dec, and on–off current ratio of 2.63 × 10<sup>7</sup>. The optimized multilayer-structured device performed better than the ZTO device annealed at 350 °C for 1 h, and even outperformed the device annealed at 500 °C for 1 h. X-ray photoelectron spectroscopy analysis was also conducted to analyze the properties of conventional ZTO and multilayered ZnO/SnO<sub>2</sub> thin films.</p></div>\",\"PeriodicalId\":21909,\"journal\":{\"name\":\"Solid-state Electronics\",\"volume\":\"216 \",\"pages\":\"Article 108920\"},\"PeriodicalIF\":1.4000,\"publicationDate\":\"2024-03-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Solid-state Electronics\",\"FirstCategoryId\":\"101\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S0038110124000698\",\"RegionNum\":4,\"RegionCategory\":\"物理与天体物理\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Solid-state Electronics","FirstCategoryId":"101","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0038110124000698","RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Performance improvement of multilayered ZnO/SnO2 thin-film transistors by varying supercycles and growth temperatures
The performance of conventional ZnSnO (ZTO) amorphous oxide semiconductor thin-film transistors deposited by atomic layer deposition was optimized at annealing temperatures greater than 500 °C, which is higher than the application temperature of flexible substrates (400 °C). Therefore, we deposited a ZTO thin film as a multilayered ZnO/SnO2 structure to lower the process temperature to below 400 °C. To optimize the performance of the device with a multilayered structure, we examined the effects of cycles and growth temperatures. Finally, after performing 6 supercycles with 10 cycles of ZnO and 20 cycles of SnO2, at a growth temperature of 180 °C and annealing at 350 °C for 1 h, the device achieved a saturation carrier mobility of 8.09 cm2/V·s, threshold voltage of 1.6 V, subthreshold swing of 0.58 V/dec, and on–off current ratio of 2.63 × 107. The optimized multilayer-structured device performed better than the ZTO device annealed at 350 °C for 1 h, and even outperformed the device annealed at 500 °C for 1 h. X-ray photoelectron spectroscopy analysis was also conducted to analyze the properties of conventional ZTO and multilayered ZnO/SnO2 thin films.
期刊介绍:
It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.