{"title":"用于级联 H 桥转换器的新型抖动载波相移正弦脉宽调制器","authors":"Dan Luo, Dong Lin, Wenzhong Zhang, Wenwu Lian","doi":"10.1049/tje2.12391","DOIUrl":null,"url":null,"abstract":"Carrier phase‐shifted sine pulse width modulation is a common modulation strategy for medium‐ and low‐voltage cascaded H‐bridges (CHB). This paper proposes a novel jittered‐carrier phase‐shifted sine pulse width modulation (JCPS‐SPWM) to reduce the total harmonic distortion (THD) of the converter. It makes the carrier jitter regularly while the total switching times remain unchanged, which reduces the THD of the bridge arm voltage and current by moving the low‐order output harmonics of the bridge arm voltage and current to filterable high‐order harmonics. Since the total number of switching times remains unchanged, this modulation strategy will not cause any increase in switching loss. A seven‐level CHB simulation model and an experimental prototype are built to verify the effectiveness of the approach. The results show that harmonic content can be reduced by 47.5% compared with the traditional method, thus verifying the effectiveness of the JCPS‐SPWM.","PeriodicalId":22858,"journal":{"name":"The Journal of Engineering","volume":"26 9","pages":""},"PeriodicalIF":0.0000,"publicationDate":"2024-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A novel jittered‐carrier phase‐shifted sine pulse width modulation for cascaded H‐bridge converter\",\"authors\":\"Dan Luo, Dong Lin, Wenzhong Zhang, Wenwu Lian\",\"doi\":\"10.1049/tje2.12391\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Carrier phase‐shifted sine pulse width modulation is a common modulation strategy for medium‐ and low‐voltage cascaded H‐bridges (CHB). This paper proposes a novel jittered‐carrier phase‐shifted sine pulse width modulation (JCPS‐SPWM) to reduce the total harmonic distortion (THD) of the converter. It makes the carrier jitter regularly while the total switching times remain unchanged, which reduces the THD of the bridge arm voltage and current by moving the low‐order output harmonics of the bridge arm voltage and current to filterable high‐order harmonics. Since the total number of switching times remains unchanged, this modulation strategy will not cause any increase in switching loss. A seven‐level CHB simulation model and an experimental prototype are built to verify the effectiveness of the approach. The results show that harmonic content can be reduced by 47.5% compared with the traditional method, thus verifying the effectiveness of the JCPS‐SPWM.\",\"PeriodicalId\":22858,\"journal\":{\"name\":\"The Journal of Engineering\",\"volume\":\"26 9\",\"pages\":\"\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2024-06-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"The Journal of Engineering\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1049/tje2.12391\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"The Journal of Engineering","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1049/tje2.12391","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
载波相移正弦脉宽调制是中低压级联 H 桥(CHB)的常用调制策略。本文提出了一种新颖的抖动载波相移正弦脉宽调制(JCPS-SPWM),以降低转换器的总谐波失真(THD)。它使载波有规律地抖动,而总开关次数保持不变,从而通过将桥臂电压和电流的低阶输出谐波移至可滤除的高阶谐波来降低桥臂电压和电流的总谐波失真。由于总开关次数保持不变,这种调制策略不会导致开关损耗增加。为验证该方法的有效性,建立了一个七级 CHB 仿真模型和一个实验原型。结果表明,与传统方法相比,谐波含量可减少 47.5%,从而验证了 JCPS-SPWM 的有效性。
A novel jittered‐carrier phase‐shifted sine pulse width modulation for cascaded H‐bridge converter
Carrier phase‐shifted sine pulse width modulation is a common modulation strategy for medium‐ and low‐voltage cascaded H‐bridges (CHB). This paper proposes a novel jittered‐carrier phase‐shifted sine pulse width modulation (JCPS‐SPWM) to reduce the total harmonic distortion (THD) of the converter. It makes the carrier jitter regularly while the total switching times remain unchanged, which reduces the THD of the bridge arm voltage and current by moving the low‐order output harmonics of the bridge arm voltage and current to filterable high‐order harmonics. Since the total number of switching times remains unchanged, this modulation strategy will not cause any increase in switching loss. A seven‐level CHB simulation model and an experimental prototype are built to verify the effectiveness of the approach. The results show that harmonic content can be reduced by 47.5% compared with the traditional method, thus verifying the effectiveness of the JCPS‐SPWM.