增强型 P 基植入碳化硅 VDMOSFET 的特性和雪崩研究

IF 1.6 4区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC Microelectronics Reliability Pub Date : 2024-07-18 DOI:10.1016/j.microrel.2024.115451
Houcai Luo , Jingping Zhang , Huan Wu , Bofeng Zheng , Xiao Wang , Kai Zheng , Guo-Qi Zhang , Xianping Chen
{"title":"增强型 P 基植入碳化硅 VDMOSFET 的特性和雪崩研究","authors":"Houcai Luo ,&nbsp;Jingping Zhang ,&nbsp;Huan Wu ,&nbsp;Bofeng Zheng ,&nbsp;Xiao Wang ,&nbsp;Kai Zheng ,&nbsp;Guo-Qi Zhang ,&nbsp;Xianping Chen","doi":"10.1016/j.microrel.2024.115451","DOIUrl":null,"url":null,"abstract":"<div><p>Two P-Based depth of SiC VDMOSFETs (group A and B) are designed and manufactured by enhanced P-Based implantation. The group A with lower P-based depth has a better static properties, while group B has a higher high frequency switching performance. Further, the avalanche reliability and failure mechanism for two groups are investigated by UIS experiment and TCAD simulation. The results show that the high temperature is generated by energy dissipation during avalanche and it drives the parasitic BJT conduction, causing I<sub>ds</sub> out of control and instantaneous heat concentration in a very short time. Significantly, high P-Based depth exhibits higher UIS reliability due to smaller R<sub>b</sub> and more difficult to active parasitic BJT.</p></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"160 ","pages":"Article 115451"},"PeriodicalIF":1.6000,"publicationDate":"2024-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Characteristics and avalanche investigation of SiC VDMOSFETs with enhanced P-Based implantation\",\"authors\":\"Houcai Luo ,&nbsp;Jingping Zhang ,&nbsp;Huan Wu ,&nbsp;Bofeng Zheng ,&nbsp;Xiao Wang ,&nbsp;Kai Zheng ,&nbsp;Guo-Qi Zhang ,&nbsp;Xianping Chen\",\"doi\":\"10.1016/j.microrel.2024.115451\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>Two P-Based depth of SiC VDMOSFETs (group A and B) are designed and manufactured by enhanced P-Based implantation. The group A with lower P-based depth has a better static properties, while group B has a higher high frequency switching performance. Further, the avalanche reliability and failure mechanism for two groups are investigated by UIS experiment and TCAD simulation. The results show that the high temperature is generated by energy dissipation during avalanche and it drives the parasitic BJT conduction, causing I<sub>ds</sub> out of control and instantaneous heat concentration in a very short time. Significantly, high P-Based depth exhibits higher UIS reliability due to smaller R<sub>b</sub> and more difficult to active parasitic BJT.</p></div>\",\"PeriodicalId\":51131,\"journal\":{\"name\":\"Microelectronics Reliability\",\"volume\":\"160 \",\"pages\":\"Article 115451\"},\"PeriodicalIF\":1.6000,\"publicationDate\":\"2024-07-18\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microelectronics Reliability\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S0026271424001318\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Reliability","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0026271424001318","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

通过增强型 P 基植入法设计和制造了两种 P 基深度的 SiC VDMOSFET(A 组和 B 组)。P 基深度较低的 A 组具有更好的静态性能,而 B 组则具有更高的高频开关性能。此外,还通过 UIS 实验和 TCAD 仿真研究了两组器件的雪崩可靠性和失效机制。结果表明,雪崩时的能量耗散会产生高温,并推动寄生 BJT 导通,导致 Ids 失控,并在极短的时间内瞬时发热。由于 Rb 较小,寄生 BJT 更难活跃,因此高 P 基底面深度的 UIS 可靠性更高。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
查看原文
分享 分享
微信好友 朋友圈 QQ好友 复制链接
本刊更多论文
Characteristics and avalanche investigation of SiC VDMOSFETs with enhanced P-Based implantation

Two P-Based depth of SiC VDMOSFETs (group A and B) are designed and manufactured by enhanced P-Based implantation. The group A with lower P-based depth has a better static properties, while group B has a higher high frequency switching performance. Further, the avalanche reliability and failure mechanism for two groups are investigated by UIS experiment and TCAD simulation. The results show that the high temperature is generated by energy dissipation during avalanche and it drives the parasitic BJT conduction, causing Ids out of control and instantaneous heat concentration in a very short time. Significantly, high P-Based depth exhibits higher UIS reliability due to smaller Rb and more difficult to active parasitic BJT.

求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
Microelectronics Reliability
Microelectronics Reliability 工程技术-工程:电子与电气
CiteScore
3.30
自引率
12.50%
发文量
342
审稿时长
68 days
期刊介绍: Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged. Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.
期刊最新文献
Comparative study of single event upset susceptibility in the Complementary FET (CFET) and FinFET based 6T-SRAM Effects of humidity, ionic contaminations and temperature on the degradation of silicone-based sealing materials used in microelectronics Physics-of-failure based lifetime modelling for SiC based automotive power modules using rate- and temperature-dependent modelling of sintered silver Study on single-event burnout hardening with reduction of hole current density by top polysilicon diode of SOI LDMOS based on TCAD simulations An online junction temperature detection circuit for SiC MOSFETs considering threshold voltage drift compensation
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
现在去查看 取消
×
提示
确定
0
微信
客服QQ
Book学术公众号 扫码关注我们
反馈
×
意见反馈
请填写您的意见或建议
请填写您的手机或邮箱
已复制链接
已复制链接
快去分享给好友吧!
我知道了
×
扫码分享
扫码分享
Book学术官方微信
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术
文献互助 智能选刊 最新文献 互助须知 联系我们:info@booksci.cn
Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。
Copyright © 2023 Book学术 All rights reserved.
ghs 京公网安备 11010802042870号 京ICP备2023020795号-1