{"title":"基于用组合电路取代小项的电路保护方法","authors":"","doi":"10.1016/j.mejo.2024.106314","DOIUrl":null,"url":null,"abstract":"<div><p>This paper introduces an integrated circuit camouflage strategy based on the minterms. The modified circuit can be well protected against SAT attacks. The method consists of two main steps: finding minterms and perturbing the circuit. This approach applies to multi-output circuits. This method allows for quick and accurate identification of minterms and the generation of circuits with significantly enhanced output disturbances. Experiments conducted on the OpenSPARC microprocessor using the ISCAS'85 and ISCAS'89 benchmark circuits demonstrate the effectiveness of our method. The time to find a minterm is only about 0.03s. The average correctness of the search is more than 90 %. The combinatorial circuit is resistant to SAT attack after replacement of the minterm. Moreover, the perturbation of circuit outputs significantly surpasses that of the original CamoPerturb structure, with one of the most notable improvements being an enhancement of approximately 330 times.</p></div>","PeriodicalId":49818,"journal":{"name":"Microelectronics Journal","volume":null,"pages":null},"PeriodicalIF":1.9000,"publicationDate":"2024-07-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://www.sciencedirect.com/science/article/pii/S1879239124000183/pdfft?md5=f3b1e2d73fe590effc833c36146c8d3d&pid=1-s2.0-S1879239124000183-main.pdf","citationCount":"0","resultStr":"{\"title\":\"A circuit protection method based on replacing minterms with combinatorial circuits\",\"authors\":\"\",\"doi\":\"10.1016/j.mejo.2024.106314\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>This paper introduces an integrated circuit camouflage strategy based on the minterms. The modified circuit can be well protected against SAT attacks. The method consists of two main steps: finding minterms and perturbing the circuit. This approach applies to multi-output circuits. This method allows for quick and accurate identification of minterms and the generation of circuits with significantly enhanced output disturbances. Experiments conducted on the OpenSPARC microprocessor using the ISCAS'85 and ISCAS'89 benchmark circuits demonstrate the effectiveness of our method. The time to find a minterm is only about 0.03s. The average correctness of the search is more than 90 %. The combinatorial circuit is resistant to SAT attack after replacement of the minterm. Moreover, the perturbation of circuit outputs significantly surpasses that of the original CamoPerturb structure, with one of the most notable improvements being an enhancement of approximately 330 times.</p></div>\",\"PeriodicalId\":49818,\"journal\":{\"name\":\"Microelectronics Journal\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":1.9000,\"publicationDate\":\"2024-07-17\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"https://www.sciencedirect.com/science/article/pii/S1879239124000183/pdfft?md5=f3b1e2d73fe590effc833c36146c8d3d&pid=1-s2.0-S1879239124000183-main.pdf\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Microelectronics Journal\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S1879239124000183\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Journal","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S1879239124000183","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
摘要
本文介绍了一种基于 minterms 的集成电路伪装策略。修改后的电路可以很好地抵御 SAT 攻击。该方法包括两个主要步骤:寻找最小项和扰动电路。这种方法适用于多输出电路。这种方法可以快速准确地识别最小项,并生成输出扰动显著增强的电路。使用 ISCAS'85 和 ISCAS'89 基准电路在 OpenSPARC 微处理器上进行的实验证明了我们方法的有效性。找到一个最小项的时间仅为 0.03 秒左右。搜索的平均正确率超过 90%。替换最小项后,组合电路可抵御 SAT 攻击。此外,电路输出的扰动效果明显优于原始的 CamoPerturb 结构,其中最显著的改进是提高了约 330 倍。
A circuit protection method based on replacing minterms with combinatorial circuits
This paper introduces an integrated circuit camouflage strategy based on the minterms. The modified circuit can be well protected against SAT attacks. The method consists of two main steps: finding minterms and perturbing the circuit. This approach applies to multi-output circuits. This method allows for quick and accurate identification of minterms and the generation of circuits with significantly enhanced output disturbances. Experiments conducted on the OpenSPARC microprocessor using the ISCAS'85 and ISCAS'89 benchmark circuits demonstrate the effectiveness of our method. The time to find a minterm is only about 0.03s. The average correctness of the search is more than 90 %. The combinatorial circuit is resistant to SAT attack after replacement of the minterm. Moreover, the perturbation of circuit outputs significantly surpasses that of the original CamoPerturb structure, with one of the most notable improvements being an enhancement of approximately 330 times.
期刊介绍:
Published since 1969, the Microelectronics Journal is an international forum for the dissemination of research and applications of microelectronic systems, circuits, and emerging technologies. Papers published in the Microelectronics Journal have undergone peer review to ensure originality, relevance, and timeliness. The journal thus provides a worldwide, regular, and comprehensive update on microelectronic circuits and systems.
The Microelectronics Journal invites papers describing significant research and applications in all of the areas listed below. Comprehensive review/survey papers covering recent developments will also be considered. The Microelectronics Journal covers circuits and systems. This topic includes but is not limited to: Analog, digital, mixed, and RF circuits and related design methodologies; Logic, architectural, and system level synthesis; Testing, design for testability, built-in self-test; Area, power, and thermal analysis and design; Mixed-domain simulation and design; Embedded systems; Non-von Neumann computing and related technologies and circuits; Design and test of high complexity systems integration; SoC, NoC, SIP, and NIP design and test; 3-D integration design and analysis; Emerging device technologies and circuits, such as FinFETs, SETs, spintronics, SFQ, MTJ, etc.
Application aspects such as signal and image processing including circuits for cryptography, sensors, and actuators including sensor networks, reliability and quality issues, and economic models are also welcome.