设计嵌入 HTCC 基底面的微通道,为多芯片 SiP 散热

IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-08-05 DOI:10.1109/TCPMT.2024.3438373
Bo Peng;Yaya Liang;Cong Liu;Ling Gao;Linjie Liu;Mingyang Wang;Zuoteng Gan;Pingan Du
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引用次数: 0

摘要

系统级封装(SiP)集成度的不断提高给热管理带来了巨大挑战。为满足多芯片 SiP 系统日益增长的热通量要求,本文提出了一种在高温共烧陶瓷(HTCC)基板中嵌入冷却微通道的方法。首先,设计了五种微通道嵌入拓扑结构,通过流热耦合数值模拟研究了它们在芯片冷却中的传热性能,结果表明蛛网状微通道的传热性能最好,尤其是在芯片热通量较高的情况下,蛛网状结构的散热效果更佳。此外,还提出了依托多芯片热通量分布的个性化蛛网状微通道平行结构,以实现 SiP 系统的高效散热,从而降低芯片温度,并最大限度地减少高热通量密度芯片对相邻芯片的干扰。最后,进行了一系列实验来验证所设计的微通道结构在 SiP 上的可行性。研究结果表明,在 HTCC 基板中嵌入微通道可提高 SiP 的散热能力,增强芯片集成度。
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Design of Microchannels Embedded in HTCC Substrate for Heat Dissipation of SiP With Multiple Chips
The escalating integration level of system-in-package (SiP) has brought about significant challenges in thermal management. To meet the requirements of ever-increasing heat flux of SiP system with multichips, a method of embedding cooling microchannels into high temperature co-fired ceramics (HTCCs) substrates is proposed in this article. First, five-microchannels embedded topology structure are designed to investigate their heat transfer performance in chip cooling in terms of the fluid-thermal coupling numerical simulations, and the results show that the spider-netted microchannel yields the best heat transfer performance, especially for the chip with high heat flux, and the conclusion that the spider-netted structure has superior heat dissipation is verified through experiments. Furthermore, a personalized spider-netted microchannel parallel structure relying the distribution of multichips heat flux is proposed to achieve efficient heat dissipation for SiP system, resulting in reduced chip temperatures and minimized interference from chips with high heat flux density on neighboring chips. Finally, a series of experiments are carried out to verify the feasibility of the designed microchannel structure for SiP. The research results indicate that embedding microchannels in HTCC substrates can be employed to improve the thermal dissipation capability of SiP and enhance chips integration.
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来源期刊
IEEE Transactions on Components, Packaging and Manufacturing Technology
IEEE Transactions on Components, Packaging and Manufacturing Technology ENGINEERING, MANUFACTURING-ENGINEERING, ELECTRICAL & ELECTRONIC
CiteScore
4.70
自引率
13.60%
发文量
203
审稿时长
3 months
期刊介绍: IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.
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