第 7 章.微型模块的组装和安装技术

V. L. Lanin, V. A. Emel’yanov, I. B. Petuhov
{"title":"第 7 章.微型模块的组装和安装技术","authors":"V. L. Lanin,&nbsp;V. A. Emel’yanov,&nbsp;I. B. Petuhov","doi":"10.3103/S1068375524700078","DOIUrl":null,"url":null,"abstract":"<p>The operation of mounting chips into packages is the most critical in the technological assembly of electronic products, pivotal for ensuring precise chip positioning, robust mechanical connection, reliable electrical contact, and efficient heat dissipation. Whether accomplished through soldering with eutectic alloys or low-melting-point solders, or via bonding onto a conductive composition, chip mounting must adhere to stringent criteria: high joint strength under thermal cycling and mechanical loads, low electrical and thermal resistance, minimal mechanical stress on the chip, and the absence of contaminants. To elucidate the thermal dynamics and mechanical stress involved, a thermal model of a power transistor with a soldered chip on a chip holder is explored. This model facilitates the determination of thermal resistance and maximum mechanical stress in the chip post-cooling. Automated technological equipment for chip mounting by vibration and ultrasonic soldering is presented, as well as the peculiarities of mounting transistor chips in D-Pak and Super-D2Pak casings, and in power electronics modules. Transitioning towards mounting with rigidly organized leads necessitates the operation of forming a matrix structure of solder leads. This operation is executed through various methods, including induction heating, laser irradiation, and others, to ensure optimal performance and reliability.</p>","PeriodicalId":782,"journal":{"name":"Surface Engineering and Applied Electrochemistry","volume":"60 3","pages":"408 - 453"},"PeriodicalIF":0.9000,"publicationDate":"2024-09-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Chapter 7. Technology for the Assembly and Mounting of Micromodules\",\"authors\":\"V. L. Lanin,&nbsp;V. A. Emel’yanov,&nbsp;I. B. Petuhov\",\"doi\":\"10.3103/S1068375524700078\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>The operation of mounting chips into packages is the most critical in the technological assembly of electronic products, pivotal for ensuring precise chip positioning, robust mechanical connection, reliable electrical contact, and efficient heat dissipation. Whether accomplished through soldering with eutectic alloys or low-melting-point solders, or via bonding onto a conductive composition, chip mounting must adhere to stringent criteria: high joint strength under thermal cycling and mechanical loads, low electrical and thermal resistance, minimal mechanical stress on the chip, and the absence of contaminants. To elucidate the thermal dynamics and mechanical stress involved, a thermal model of a power transistor with a soldered chip on a chip holder is explored. This model facilitates the determination of thermal resistance and maximum mechanical stress in the chip post-cooling. Automated technological equipment for chip mounting by vibration and ultrasonic soldering is presented, as well as the peculiarities of mounting transistor chips in D-Pak and Super-D2Pak casings, and in power electronics modules. Transitioning towards mounting with rigidly organized leads necessitates the operation of forming a matrix structure of solder leads. This operation is executed through various methods, including induction heating, laser irradiation, and others, to ensure optimal performance and reliability.</p>\",\"PeriodicalId\":782,\"journal\":{\"name\":\"Surface Engineering and Applied Electrochemistry\",\"volume\":\"60 3\",\"pages\":\"408 - 453\"},\"PeriodicalIF\":0.9000,\"publicationDate\":\"2024-09-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Surface Engineering and Applied Electrochemistry\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://link.springer.com/article/10.3103/S1068375524700078\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"Engineering\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Surface Engineering and Applied Electrochemistry","FirstCategoryId":"1085","ListUrlMain":"https://link.springer.com/article/10.3103/S1068375524700078","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"Engineering","Score":null,"Total":0}
引用次数: 0

摘要

摘要将芯片安装到封装中的操作是电子产品技术组装中最关键的操作,对于确保芯片的精确定位、牢固的机械连接、可靠的电气接触和高效散热至关重要。无论是通过使用共晶合金或低熔点焊料进行焊接,还是通过粘接到导电成分上,芯片安装都必须遵守严格的标准:在热循环和机械负载下具有较高的接合强度、较低的电阻和热阻、芯片上的机械应力最小以及不含污染物。为了阐明所涉及的热动力学和机械应力,我们对芯片支架上焊接芯片的功率晶体管热模型进行了探讨。该模型有助于确定芯片冷却后的热阻和最大机械应力。介绍了通过振动和超声波焊接进行芯片安装的自动化技术设备,以及在 D-Pak 和 Super-D2Pak 外壳以及电力电子模块中安装晶体管芯片的特殊性。要过渡到使用刚性引线进行安装,就必须进行形成焊接引线矩阵结构的操作。这一操作需要通过感应加热、激光照射等多种方法进行,以确保最佳性能和可靠性。
本文章由计算机程序翻译,如有差异,请以英文原文为准。

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Chapter 7. Technology for the Assembly and Mounting of Micromodules

The operation of mounting chips into packages is the most critical in the technological assembly of electronic products, pivotal for ensuring precise chip positioning, robust mechanical connection, reliable electrical contact, and efficient heat dissipation. Whether accomplished through soldering with eutectic alloys or low-melting-point solders, or via bonding onto a conductive composition, chip mounting must adhere to stringent criteria: high joint strength under thermal cycling and mechanical loads, low electrical and thermal resistance, minimal mechanical stress on the chip, and the absence of contaminants. To elucidate the thermal dynamics and mechanical stress involved, a thermal model of a power transistor with a soldered chip on a chip holder is explored. This model facilitates the determination of thermal resistance and maximum mechanical stress in the chip post-cooling. Automated technological equipment for chip mounting by vibration and ultrasonic soldering is presented, as well as the peculiarities of mounting transistor chips in D-Pak and Super-D2Pak casings, and in power electronics modules. Transitioning towards mounting with rigidly organized leads necessitates the operation of forming a matrix structure of solder leads. This operation is executed through various methods, including induction heating, laser irradiation, and others, to ensure optimal performance and reliability.

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来源期刊
Surface Engineering and Applied Electrochemistry
Surface Engineering and Applied Electrochemistry Engineering-Industrial and Manufacturing Engineering
CiteScore
1.60
自引率
22.20%
发文量
54
期刊介绍: Surface Engineering and Applied Electrochemistry is a journal that publishes original and review articles on theory and applications of electroerosion and electrochemical methods for the treatment of materials; physical and chemical methods for the preparation of macro-, micro-, and nanomaterials and their properties; electrical processes in engineering, chemistry, and methods for the processing of biological products and food; and application electromagnetic fields in biological systems.
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