{"title":"第 7 章.微型模块的组装和安装技术","authors":"V. L. Lanin, V. A. Emel’yanov, I. B. Petuhov","doi":"10.3103/S1068375524700078","DOIUrl":null,"url":null,"abstract":"<p>The operation of mounting chips into packages is the most critical in the technological assembly of electronic products, pivotal for ensuring precise chip positioning, robust mechanical connection, reliable electrical contact, and efficient heat dissipation. Whether accomplished through soldering with eutectic alloys or low-melting-point solders, or via bonding onto a conductive composition, chip mounting must adhere to stringent criteria: high joint strength under thermal cycling and mechanical loads, low electrical and thermal resistance, minimal mechanical stress on the chip, and the absence of contaminants. To elucidate the thermal dynamics and mechanical stress involved, a thermal model of a power transistor with a soldered chip on a chip holder is explored. This model facilitates the determination of thermal resistance and maximum mechanical stress in the chip post-cooling. Automated technological equipment for chip mounting by vibration and ultrasonic soldering is presented, as well as the peculiarities of mounting transistor chips in D-Pak and Super-D2Pak casings, and in power electronics modules. Transitioning towards mounting with rigidly organized leads necessitates the operation of forming a matrix structure of solder leads. This operation is executed through various methods, including induction heating, laser irradiation, and others, to ensure optimal performance and reliability.</p>","PeriodicalId":782,"journal":{"name":"Surface Engineering and Applied Electrochemistry","volume":"60 3","pages":"408 - 453"},"PeriodicalIF":0.9000,"publicationDate":"2024-09-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Chapter 7. Technology for the Assembly and Mounting of Micromodules\",\"authors\":\"V. L. Lanin, V. A. Emel’yanov, I. B. Petuhov\",\"doi\":\"10.3103/S1068375524700078\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<p>The operation of mounting chips into packages is the most critical in the technological assembly of electronic products, pivotal for ensuring precise chip positioning, robust mechanical connection, reliable electrical contact, and efficient heat dissipation. Whether accomplished through soldering with eutectic alloys or low-melting-point solders, or via bonding onto a conductive composition, chip mounting must adhere to stringent criteria: high joint strength under thermal cycling and mechanical loads, low electrical and thermal resistance, minimal mechanical stress on the chip, and the absence of contaminants. To elucidate the thermal dynamics and mechanical stress involved, a thermal model of a power transistor with a soldered chip on a chip holder is explored. This model facilitates the determination of thermal resistance and maximum mechanical stress in the chip post-cooling. Automated technological equipment for chip mounting by vibration and ultrasonic soldering is presented, as well as the peculiarities of mounting transistor chips in D-Pak and Super-D2Pak casings, and in power electronics modules. Transitioning towards mounting with rigidly organized leads necessitates the operation of forming a matrix structure of solder leads. This operation is executed through various methods, including induction heating, laser irradiation, and others, to ensure optimal performance and reliability.</p>\",\"PeriodicalId\":782,\"journal\":{\"name\":\"Surface Engineering and Applied Electrochemistry\",\"volume\":\"60 3\",\"pages\":\"408 - 453\"},\"PeriodicalIF\":0.9000,\"publicationDate\":\"2024-09-09\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Surface Engineering and Applied Electrochemistry\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://link.springer.com/article/10.3103/S1068375524700078\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q3\",\"JCRName\":\"Engineering\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Surface Engineering and Applied Electrochemistry","FirstCategoryId":"1085","ListUrlMain":"https://link.springer.com/article/10.3103/S1068375524700078","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"Engineering","Score":null,"Total":0}
Chapter 7. Technology for the Assembly and Mounting of Micromodules
The operation of mounting chips into packages is the most critical in the technological assembly of electronic products, pivotal for ensuring precise chip positioning, robust mechanical connection, reliable electrical contact, and efficient heat dissipation. Whether accomplished through soldering with eutectic alloys or low-melting-point solders, or via bonding onto a conductive composition, chip mounting must adhere to stringent criteria: high joint strength under thermal cycling and mechanical loads, low electrical and thermal resistance, minimal mechanical stress on the chip, and the absence of contaminants. To elucidate the thermal dynamics and mechanical stress involved, a thermal model of a power transistor with a soldered chip on a chip holder is explored. This model facilitates the determination of thermal resistance and maximum mechanical stress in the chip post-cooling. Automated technological equipment for chip mounting by vibration and ultrasonic soldering is presented, as well as the peculiarities of mounting transistor chips in D-Pak and Super-D2Pak casings, and in power electronics modules. Transitioning towards mounting with rigidly organized leads necessitates the operation of forming a matrix structure of solder leads. This operation is executed through various methods, including induction heating, laser irradiation, and others, to ensure optimal performance and reliability.
期刊介绍:
Surface Engineering and Applied Electrochemistry is a journal that publishes original and review articles on theory and applications of electroerosion and electrochemical methods for the treatment of materials; physical and chemical methods for the preparation of macro-, micro-, and nanomaterials and their properties; electrical processes in engineering, chemistry, and methods for the processing of biological products and food; and application electromagnetic fields in biological systems.