The Assembly Investigation of a Multichip to PCB Flip-Chip Package Using Cu Pillar Bumps

This article conducts a comprehensive investigation of the assembly technologies of a Cu pillar-based multichip flip-chip package with low-cost PCB substrates. Such a package is considered as a cost-effective solution for mm-wave broadband applications below 60 GHz. Three main trend flip-chip assembly methods are compared: mass reflow soldering, Cu pillar thermocompression soldering, and Au-Cu thermocompression bonding (TCB). Within these three assembly approaches, both the samples used for assembly and the assembly conditions are systematically compared. Specifically, Cu pillars with and without solder caps, PCB substrates with different solder mask thicknesses, PCB substrates with different glass transition temperatures, and different bonding compression forces are carried out in different assembly approaches. After the assembly, the assembly yield and contact resistance per bump are examined by meander daisy chain resistance measurement and the bonding qualities of both the whole chip and individual bumps are inspected using shear testing and cross sectioning. Findings reveal that reflow soldering offers advantages for high-volume, cost-effective assemblies despite a slightly lower yield, and the Au-Cu TCB exhibits a very high yield with diminished throughput. Whereas, Cu pillar thermocompression soldering does not manifest advantages over the other two approaches. This meticulous investigation enhances the accessibility of the discussed packaging approach, contributing to the groundwork for future technological advancements in this domain.