Marif Daula Siddique;Prasanth Sundararajan;Mrutyunjaya Sahani;Sanjib Kumar Panda
{"title":"基于容错分析的减少开关数量的单相多电平逆变器拓扑性能评估","authors":"Marif Daula Siddique;Prasanth Sundararajan;Mrutyunjaya Sahani;Sanjib Kumar Panda","doi":"10.1109/JESTPE.2024.3481666","DOIUrl":null,"url":null,"abstract":"Over the last several years, there has been significant emphasis on the study of multilevel inverters (MLIs) within the field of power electronics. MLI is often preferred over traditional <inline-formula> <tex-math>$2{L}$ </tex-math></inline-formula> inverters owing to its enhanced performance characteristics. Various MLI architectures have been developed in recent years, each using a different set of components to provide a distinct voltage level across load terminals. MLIs are vulnerable to several types of faults due to a higher number of components and subassemblies. The fault-tolerant (FT) ability of the topologies is very crucial for the reliable operation of the overall system. This article provides a study of the FT ability of different types of MLIs. In the analysis, switch and source faults (SFs) have been considered with different fault categories. Single switch, combinations of two switches, and SFs have been analyzed. A comparison of different fault indices has also been provided, which guides the direction of future research in the field of FT MLIs. Experimental validations for highlighting the usefulness of the FT analysis for two common types of topologies widely used have been carried out for various types of faults and test results are provided.","PeriodicalId":13093,"journal":{"name":"IEEE Journal of Emerging and Selected Topics in Power Electronics","volume":"13 1","pages":"147-161"},"PeriodicalIF":4.6000,"publicationDate":"2024-10-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Fault-Tolerant Analysis-Based Performance Assessment of Single-Phase Multilevel Inverter Topologies With Reduced Switch Count\",\"authors\":\"Marif Daula Siddique;Prasanth Sundararajan;Mrutyunjaya Sahani;Sanjib Kumar Panda\",\"doi\":\"10.1109/JESTPE.2024.3481666\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Over the last several years, there has been significant emphasis on the study of multilevel inverters (MLIs) within the field of power electronics. MLI is often preferred over traditional <inline-formula> <tex-math>$2{L}$ </tex-math></inline-formula> inverters owing to its enhanced performance characteristics. Various MLI architectures have been developed in recent years, each using a different set of components to provide a distinct voltage level across load terminals. MLIs are vulnerable to several types of faults due to a higher number of components and subassemblies. The fault-tolerant (FT) ability of the topologies is very crucial for the reliable operation of the overall system. This article provides a study of the FT ability of different types of MLIs. In the analysis, switch and source faults (SFs) have been considered with different fault categories. Single switch, combinations of two switches, and SFs have been analyzed. A comparison of different fault indices has also been provided, which guides the direction of future research in the field of FT MLIs. Experimental validations for highlighting the usefulness of the FT analysis for two common types of topologies widely used have been carried out for various types of faults and test results are provided.\",\"PeriodicalId\":13093,\"journal\":{\"name\":\"IEEE Journal of Emerging and Selected Topics in Power Electronics\",\"volume\":\"13 1\",\"pages\":\"147-161\"},\"PeriodicalIF\":4.6000,\"publicationDate\":\"2024-10-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Journal of Emerging and Selected Topics in Power Electronics\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10720134/\",\"RegionNum\":2,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q1\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of Emerging and Selected Topics in Power Electronics","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10720134/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q1","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Fault-Tolerant Analysis-Based Performance Assessment of Single-Phase Multilevel Inverter Topologies With Reduced Switch Count
Over the last several years, there has been significant emphasis on the study of multilevel inverters (MLIs) within the field of power electronics. MLI is often preferred over traditional $2{L}$ inverters owing to its enhanced performance characteristics. Various MLI architectures have been developed in recent years, each using a different set of components to provide a distinct voltage level across load terminals. MLIs are vulnerable to several types of faults due to a higher number of components and subassemblies. The fault-tolerant (FT) ability of the topologies is very crucial for the reliable operation of the overall system. This article provides a study of the FT ability of different types of MLIs. In the analysis, switch and source faults (SFs) have been considered with different fault categories. Single switch, combinations of two switches, and SFs have been analyzed. A comparison of different fault indices has also been provided, which guides the direction of future research in the field of FT MLIs. Experimental validations for highlighting the usefulness of the FT analysis for two common types of topologies widely used have been carried out for various types of faults and test results are provided.
期刊介绍:
The aim of the journal is to enable the power electronics community to address the emerging and selected topics in power electronics in an agile fashion. It is a forum where multidisciplinary and discriminating technologies and applications are discussed by and for both practitioners and researchers on timely topics in power electronics from components to systems.