大规模共封装光学元件(CPO)组件的热力学和压缩分析

IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC IEEE Transactions on Components, Packaging and Manufacturing Technology Pub Date : 2024-10-30 DOI:10.1109/TCPMT.2024.3488003
Rui Cao;Huimin He;Fengze Hou;Rui Ma;Fengman Liu;Qidong Wang;Liqiang Cao
{"title":"大规模共封装光学元件(CPO)组件的热力学和压缩分析","authors":"Rui Cao;Huimin He;Fengze Hou;Rui Ma;Fengman Liu;Qidong Wang;Liqiang Cao","doi":"10.1109/TCPMT.2024.3488003","DOIUrl":null,"url":null,"abstract":"With the development of artificial intelligence (AI) and other high-performance computing, the data transmission bandwidth in data centers has increased to 51.2 Tbps and will double every two years. The traditional pluggable optical modules have difficulty in satisfying the requirements. Co-packaged optics (CPO) integrates ASICs and optical engines (OEs) on the same substrate, providing a low energy loss and high throughput solution. However, the CPO structure is complicated and the package size is large. Therefore, the assembly-induced mechanical stresses and warpage of CPO are serious issues. In this article, assembly feasibility based on a \n<inline-formula> <tex-math>$200\\times 200$ </tex-math></inline-formula>\n mm2 51.2-Tbps CPO was analyzed by a cross-scale simulation methodology with multiple mechanical stresses. First, the ASIC structure optimization of the CPO was carried out, and the CPO substrate was determined. Then, based on the above-optimized structure, the thermal reflow simulations of ASIC and mechanical compression simulations of OEs were conducted by the birth and death element method. The results showed that the stiffener ring in the ASIC package was optimized to be 3 mm in height and 15 mm in width. The 5-mm PCB was determined for the CPO substrate. The CPO substrate warpage under the socket after the thermal reflow was less than 0.05 mm and the maximum equivalent stresses of the ball grid array (BGA) in the whole assembly process were less than the yield strength of the SAC305 by submodel structure analysis. The socket terminal forces after mechanical compression were greater than 0.1 N. The analyzed results meet the process targets during the assembly of the CPO.","PeriodicalId":13085,"journal":{"name":"IEEE Transactions on Components, Packaging and Manufacturing Technology","volume":"14 11","pages":"2079-2087"},"PeriodicalIF":2.3000,"publicationDate":"2024-10-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Thermomechanical and Compression Analyses for Large-Scale Co-Packaged Optics (CPO) Assembly\",\"authors\":\"Rui Cao;Huimin He;Fengze Hou;Rui Ma;Fengman Liu;Qidong Wang;Liqiang Cao\",\"doi\":\"10.1109/TCPMT.2024.3488003\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"With the development of artificial intelligence (AI) and other high-performance computing, the data transmission bandwidth in data centers has increased to 51.2 Tbps and will double every two years. The traditional pluggable optical modules have difficulty in satisfying the requirements. Co-packaged optics (CPO) integrates ASICs and optical engines (OEs) on the same substrate, providing a low energy loss and high throughput solution. However, the CPO structure is complicated and the package size is large. Therefore, the assembly-induced mechanical stresses and warpage of CPO are serious issues. In this article, assembly feasibility based on a \\n<inline-formula> <tex-math>$200\\\\times 200$ </tex-math></inline-formula>\\n mm2 51.2-Tbps CPO was analyzed by a cross-scale simulation methodology with multiple mechanical stresses. First, the ASIC structure optimization of the CPO was carried out, and the CPO substrate was determined. Then, based on the above-optimized structure, the thermal reflow simulations of ASIC and mechanical compression simulations of OEs were conducted by the birth and death element method. The results showed that the stiffener ring in the ASIC package was optimized to be 3 mm in height and 15 mm in width. The 5-mm PCB was determined for the CPO substrate. The CPO substrate warpage under the socket after the thermal reflow was less than 0.05 mm and the maximum equivalent stresses of the ball grid array (BGA) in the whole assembly process were less than the yield strength of the SAC305 by submodel structure analysis. The socket terminal forces after mechanical compression were greater than 0.1 N. The analyzed results meet the process targets during the assembly of the CPO.\",\"PeriodicalId\":13085,\"journal\":{\"name\":\"IEEE Transactions on Components, Packaging and Manufacturing Technology\",\"volume\":\"14 11\",\"pages\":\"2079-2087\"},\"PeriodicalIF\":2.3000,\"publicationDate\":\"2024-10-30\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Transactions on Components, Packaging and Manufacturing Technology\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://ieeexplore.ieee.org/document/10738830/\",\"RegionNum\":3,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q2\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Components, Packaging and Manufacturing Technology","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10738830/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0

摘要

随着人工智能(AI)等高性能计算的发展,数据中心的数据传输带宽已增至51.2 Tbps,并将每两年翻一番。传统的可插拔光模块难以满足要求。共封装光学器件(CPO)将asic和光引擎(OEs)集成在同一衬底上,提供低能量损耗和高吞吐量的解决方案。但是,CPO结构复杂,封装尺寸较大。因此,CPO的装配引起的机械应力和翘曲是一个严重的问题。在本文中,基于200\ × 200$ mm2 51.2 tbps CPO的装配可行性通过跨尺度模拟方法分析了多个机械应力。首先,对CPO的ASIC结构进行了优化,确定了CPO衬底。然后,基于上述优化结构,采用生灭元法对ASIC进行了热回流仿真和OEs的力学压缩仿真。结果表明,优化后ASIC封装中的加强环高度为3 mm,宽度为15 mm。为CPO衬底确定了5mm PCB。经子模型结构分析,CPO衬底经热再流处理后翘曲量小于0.05 mm,球栅阵列(BGA)在整个装配过程中的最大等效应力小于SAC305的屈服强度。机械压缩后的套接端受力均大于0.1 n,分析结果满足CPO装配过程中的工艺指标。
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Thermomechanical and Compression Analyses for Large-Scale Co-Packaged Optics (CPO) Assembly
With the development of artificial intelligence (AI) and other high-performance computing, the data transmission bandwidth in data centers has increased to 51.2 Tbps and will double every two years. The traditional pluggable optical modules have difficulty in satisfying the requirements. Co-packaged optics (CPO) integrates ASICs and optical engines (OEs) on the same substrate, providing a low energy loss and high throughput solution. However, the CPO structure is complicated and the package size is large. Therefore, the assembly-induced mechanical stresses and warpage of CPO are serious issues. In this article, assembly feasibility based on a $200\times 200$ mm2 51.2-Tbps CPO was analyzed by a cross-scale simulation methodology with multiple mechanical stresses. First, the ASIC structure optimization of the CPO was carried out, and the CPO substrate was determined. Then, based on the above-optimized structure, the thermal reflow simulations of ASIC and mechanical compression simulations of OEs were conducted by the birth and death element method. The results showed that the stiffener ring in the ASIC package was optimized to be 3 mm in height and 15 mm in width. The 5-mm PCB was determined for the CPO substrate. The CPO substrate warpage under the socket after the thermal reflow was less than 0.05 mm and the maximum equivalent stresses of the ball grid array (BGA) in the whole assembly process were less than the yield strength of the SAC305 by submodel structure analysis. The socket terminal forces after mechanical compression were greater than 0.1 N. The analyzed results meet the process targets during the assembly of the CPO.
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来源期刊
IEEE Transactions on Components, Packaging and Manufacturing Technology
IEEE Transactions on Components, Packaging and Manufacturing Technology ENGINEERING, MANUFACTURING-ENGINEERING, ELECTRICAL & ELECTRONIC
CiteScore
4.70
自引率
13.60%
发文量
203
审稿时长
3 months
期刊介绍: IEEE Transactions on Components, Packaging, and Manufacturing Technology publishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging, in addition to new developments in passive components, electrical contacts and connectors, thermal management, and device reliability; as well as the manufacture of electronics parts and assemblies, with broad coverage of design, factory modeling, assembly methods, quality, product robustness, and design-for-environment.
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Table of Contents IEEE Transactions on Components, Packaging and Manufacturing Technology Information for Authors IEEE Transactions on Components, Packaging and Manufacturing Technology Publication Information IEEE Transactions on Components, Packaging and Manufacturing Technology Society Information Table of Contents
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