Chun Hei Edmund Sek, M. Z. Abdullah, Kok Hwa Yu, Shaw Fong Wong
{"title":"回流成型PCB板动态翘曲模拟","authors":"Chun Hei Edmund Sek, M. Z. Abdullah, Kok Hwa Yu, Shaw Fong Wong","doi":"10.1108/cw-02-2021-0061","DOIUrl":null,"url":null,"abstract":"\nPurpose\nThis study aims to simulate molded printed circuit board (PCB) warpage behavior under reflow temperature distribution. Simulation models are used to estimate dynamic warpage behavior for different form factor sizes.\n\n\nDesign/methodology/approach\nThis study analyzes warpage during the reflow process. The shadow moiré experiment methodology is used to collect data on the dynamic warpage performance of a model with a form factor of 10mm × 10mm × 1mm. The temperature profile with heating from 25°C to 300°C at intervals of 50°C is used, and the sample is made to undergo a cooling process until it reaches the room temperature. Subsequently, ANSYS static structural simulation is performed on similar form factor models to ascertain the accuracy of the simulation results.\n\n\nFindings\nResults show that the deformation and total force induced by coefficient of thermal expansion (CTE) mismatch are examined based on the warpage performance of models with different sizes, that is, 45mm × 45mm × 1mm and 45mm × 15mm × 1mm. Compared with the experimental data, the simulated modeling accuracy yields a less than 5% deviation in the dynamic warpage prediction at a reflow temperature of 300°C. Results also reveal that the larger the model, the larger the warpage changes under the reflow temperature.\n\n\nResearch limitations/implications\nThe simulated warpage is limited to the temperature and force induced by CTE mismatch between two materials. The form factor of the ball-grid array model is limited to only three different sizes. The model is assumed to be steady, isothermal and static. The simulation adopts homogenous materials, as it cannot accurately model nonhomogeneous multilayered composite materials.\n\n\nPractical implications\nThis study can provide engineers and researchers with a profound understanding of molded PCB warpage, minimal resource utilization and the improved product development process.\n\n\nSocial implications\nThe accurate prediction of molded PCB warpage can enable efficient product development and reduce resources and production time, thereby creating a sustainable environment.\n\n\nOriginality/value\nThe literature review points out that warpage in various types of PCBs was successfully examined, and that considerable efforts were exerted to investigate warpage reduction in PCB modules. However, PCB warpage studies are limited to bare PCBs. To the best of the authors’ knowledge, the examination of warpage in a molded PCB designed with a molded compound cover, as depicted in Figure 3, is yet to be conducted. A molded compound provides strong lattice support for PCBs to prevent deformation during the reflow process, which is a topic of considerable interest and should be explored.\n","PeriodicalId":50693,"journal":{"name":"Circuit World","volume":" ","pages":""},"PeriodicalIF":0.8000,"publicationDate":"2021-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Dynamic warpage simulation of molded PCB under reflow process\",\"authors\":\"Chun Hei Edmund Sek, M. Z. Abdullah, Kok Hwa Yu, Shaw Fong Wong\",\"doi\":\"10.1108/cw-02-2021-0061\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\\nPurpose\\nThis study aims to simulate molded printed circuit board (PCB) warpage behavior under reflow temperature distribution. Simulation models are used to estimate dynamic warpage behavior for different form factor sizes.\\n\\n\\nDesign/methodology/approach\\nThis study analyzes warpage during the reflow process. The shadow moiré experiment methodology is used to collect data on the dynamic warpage performance of a model with a form factor of 10mm × 10mm × 1mm. The temperature profile with heating from 25°C to 300°C at intervals of 50°C is used, and the sample is made to undergo a cooling process until it reaches the room temperature. Subsequently, ANSYS static structural simulation is performed on similar form factor models to ascertain the accuracy of the simulation results.\\n\\n\\nFindings\\nResults show that the deformation and total force induced by coefficient of thermal expansion (CTE) mismatch are examined based on the warpage performance of models with different sizes, that is, 45mm × 45mm × 1mm and 45mm × 15mm × 1mm. Compared with the experimental data, the simulated modeling accuracy yields a less than 5% deviation in the dynamic warpage prediction at a reflow temperature of 300°C. Results also reveal that the larger the model, the larger the warpage changes under the reflow temperature.\\n\\n\\nResearch limitations/implications\\nThe simulated warpage is limited to the temperature and force induced by CTE mismatch between two materials. The form factor of the ball-grid array model is limited to only three different sizes. The model is assumed to be steady, isothermal and static. The simulation adopts homogenous materials, as it cannot accurately model nonhomogeneous multilayered composite materials.\\n\\n\\nPractical implications\\nThis study can provide engineers and researchers with a profound understanding of molded PCB warpage, minimal resource utilization and the improved product development process.\\n\\n\\nSocial implications\\nThe accurate prediction of molded PCB warpage can enable efficient product development and reduce resources and production time, thereby creating a sustainable environment.\\n\\n\\nOriginality/value\\nThe literature review points out that warpage in various types of PCBs was successfully examined, and that considerable efforts were exerted to investigate warpage reduction in PCB modules. However, PCB warpage studies are limited to bare PCBs. To the best of the authors’ knowledge, the examination of warpage in a molded PCB designed with a molded compound cover, as depicted in Figure 3, is yet to be conducted. A molded compound provides strong lattice support for PCBs to prevent deformation during the reflow process, which is a topic of considerable interest and should be explored.\\n\",\"PeriodicalId\":50693,\"journal\":{\"name\":\"Circuit World\",\"volume\":\" \",\"pages\":\"\"},\"PeriodicalIF\":0.8000,\"publicationDate\":\"2021-09-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Circuit World\",\"FirstCategoryId\":\"5\",\"ListUrlMain\":\"https://doi.org/10.1108/cw-02-2021-0061\",\"RegionNum\":4,\"RegionCategory\":\"工程技术\",\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"ENGINEERING, ELECTRICAL & ELECTRONIC\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Circuit World","FirstCategoryId":"5","ListUrlMain":"https://doi.org/10.1108/cw-02-2021-0061","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
Dynamic warpage simulation of molded PCB under reflow process
Purpose
This study aims to simulate molded printed circuit board (PCB) warpage behavior under reflow temperature distribution. Simulation models are used to estimate dynamic warpage behavior for different form factor sizes.
Design/methodology/approach
This study analyzes warpage during the reflow process. The shadow moiré experiment methodology is used to collect data on the dynamic warpage performance of a model with a form factor of 10mm × 10mm × 1mm. The temperature profile with heating from 25°C to 300°C at intervals of 50°C is used, and the sample is made to undergo a cooling process until it reaches the room temperature. Subsequently, ANSYS static structural simulation is performed on similar form factor models to ascertain the accuracy of the simulation results.
Findings
Results show that the deformation and total force induced by coefficient of thermal expansion (CTE) mismatch are examined based on the warpage performance of models with different sizes, that is, 45mm × 45mm × 1mm and 45mm × 15mm × 1mm. Compared with the experimental data, the simulated modeling accuracy yields a less than 5% deviation in the dynamic warpage prediction at a reflow temperature of 300°C. Results also reveal that the larger the model, the larger the warpage changes under the reflow temperature.
Research limitations/implications
The simulated warpage is limited to the temperature and force induced by CTE mismatch between two materials. The form factor of the ball-grid array model is limited to only three different sizes. The model is assumed to be steady, isothermal and static. The simulation adopts homogenous materials, as it cannot accurately model nonhomogeneous multilayered composite materials.
Practical implications
This study can provide engineers and researchers with a profound understanding of molded PCB warpage, minimal resource utilization and the improved product development process.
Social implications
The accurate prediction of molded PCB warpage can enable efficient product development and reduce resources and production time, thereby creating a sustainable environment.
Originality/value
The literature review points out that warpage in various types of PCBs was successfully examined, and that considerable efforts were exerted to investigate warpage reduction in PCB modules. However, PCB warpage studies are limited to bare PCBs. To the best of the authors’ knowledge, the examination of warpage in a molded PCB designed with a molded compound cover, as depicted in Figure 3, is yet to be conducted. A molded compound provides strong lattice support for PCBs to prevent deformation during the reflow process, which is a topic of considerable interest and should be explored.
期刊介绍:
Circuit World is a platform for state of the art, technical papers and editorials in the areas of electronics circuit, component, assembly, and product design, manufacture, test, and use, including quality, reliability and safety. The journal comprises the multidisciplinary study of the various theories, methodologies, technologies, processes and applications relating to todays and future electronics. Circuit World provides a comprehensive and authoritative information source for research, application and current awareness purposes.
Circuit World covers a broad range of topics, including:
• Circuit theory, design methodology, analysis and simulation
• Digital, analog, microwave and optoelectronic integrated circuits
• Semiconductors, passives, connectors and sensors
• Electronic packaging of components, assemblies and products
• PCB design technologies and processes (controlled impedance, high-speed PCBs, laminates and lamination, laser processes and drilling, moulded interconnect devices, multilayer boards, optical PCBs, single- and double-sided boards, soldering and solderable finishes)
• Design for X (including manufacturability, quality, reliability, maintainability, sustainment, safety, reuse, disposal)
• Internet of Things (IoT).