{"title":"高温双层陶瓷封装基板","authors":"Ardalan Nasiri, S. Ang","doi":"10.4071/imaps.1123535","DOIUrl":null,"url":null,"abstract":"\n A double-layer ceramic electronic packaging technology that survives the Venusian surface temperature of 465°C was developed using a ceramic interlayer dielectric with gold conductors. A 60-μm ceramic interlayer dielectric served as the insulator between the top and bottom gold conductors on high-purity ceramic substrates. Test devices with AuPtPd metallization were attached to the top gold pads using a thick-film gold paste. Thermal aging for 115 h at 500°C and thermal cycling from room temperature to 450°C were performed. Dielectric leakage tests of the interlayer ceramic layer between the top and bottom gold conductors revealed a leakage current density of less than 50 × 10−7 A/cm2 at 600 V after thermal cycling. Gold conductor resistance increased slightly after thermal cycling. The die shear test showed a 33% decrease in die shear strength after thermal tests and its 6.16 kg-F die shear strength satisfies the Military Standard Product Testing Services (MIL-STD) method.","PeriodicalId":35312,"journal":{"name":"Journal of Microelectronics and Electronic Packaging","volume":"17 1","pages":"99-105"},"PeriodicalIF":0.0000,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"High-Temperature Double-Layer Ceramic Packaging Substrates\",\"authors\":\"Ardalan Nasiri, S. Ang\",\"doi\":\"10.4071/imaps.1123535\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"\\n A double-layer ceramic electronic packaging technology that survives the Venusian surface temperature of 465°C was developed using a ceramic interlayer dielectric with gold conductors. A 60-μm ceramic interlayer dielectric served as the insulator between the top and bottom gold conductors on high-purity ceramic substrates. Test devices with AuPtPd metallization were attached to the top gold pads using a thick-film gold paste. Thermal aging for 115 h at 500°C and thermal cycling from room temperature to 450°C were performed. Dielectric leakage tests of the interlayer ceramic layer between the top and bottom gold conductors revealed a leakage current density of less than 50 × 10−7 A/cm2 at 600 V after thermal cycling. Gold conductor resistance increased slightly after thermal cycling. The die shear test showed a 33% decrease in die shear strength after thermal tests and its 6.16 kg-F die shear strength satisfies the Military Standard Product Testing Services (MIL-STD) method.\",\"PeriodicalId\":35312,\"journal\":{\"name\":\"Journal of Microelectronics and Electronic Packaging\",\"volume\":\"17 1\",\"pages\":\"99-105\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2020-07-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Journal of Microelectronics and Electronic Packaging\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.4071/imaps.1123535\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"Q4\",\"JCRName\":\"Engineering\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Journal of Microelectronics and Electronic Packaging","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.4071/imaps.1123535","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q4","JCRName":"Engineering","Score":null,"Total":0}
A double-layer ceramic electronic packaging technology that survives the Venusian surface temperature of 465°C was developed using a ceramic interlayer dielectric with gold conductors. A 60-μm ceramic interlayer dielectric served as the insulator between the top and bottom gold conductors on high-purity ceramic substrates. Test devices with AuPtPd metallization were attached to the top gold pads using a thick-film gold paste. Thermal aging for 115 h at 500°C and thermal cycling from room temperature to 450°C were performed. Dielectric leakage tests of the interlayer ceramic layer between the top and bottom gold conductors revealed a leakage current density of less than 50 × 10−7 A/cm2 at 600 V after thermal cycling. Gold conductor resistance increased slightly after thermal cycling. The die shear test showed a 33% decrease in die shear strength after thermal tests and its 6.16 kg-F die shear strength satisfies the Military Standard Product Testing Services (MIL-STD) method.
期刊介绍:
The International Microelectronics And Packaging Society (IMAPS) is the largest society dedicated to the advancement and growth of microelectronics and electronics packaging technologies through professional education. The Society’s portfolio of technologies is disseminated through symposia, conferences, workshops, professional development courses and other efforts. IMAPS currently has more than 4,000 members in the United States and more than 4,000 international members around the world.