Efficient partial product reduction for image processing application using approximate 4:2 compressor

Purpose This paper aims to improve the performance of approximate multiplier in terms of peak signal to noise ratio (PSNR) and quality of the image. Design/methodology/approach The paper proposes an approximate circuit for 4:2 compressor, which shows a significant amount of improvement in performance metrics than that of the existing designs. This paper also reports a hybrid architecture for the Dadda multiplier, which incorporates proposed 4:2 compressor circuit as a basic building block. Findings Hybrid Dadda multiplier architecture is used in a median filter for image de-noising application and achieved 20% more PSNR than that of the best available designs. Originality/value The proposed 4:2 compressor improves the error metrics of a Hybrid Dadda multiplier.