{"title":"考虑高k栅氧化物对SOI基GaN FinFET直流和模拟/RF性能的影响","authors":"Vandana Singh Rajawat , Ajay Kumar , Bharat Choudhary","doi":"10.1016/j.memori.2023.100079","DOIUrl":null,"url":null,"abstract":"<div><p>This paper suggests an analysis of SOI-based GaN FinFET that considers high-k gate oxide into account. The effect of using SOI substrate and a high-k dielectric layer on ON current, OFF current, electric field, electron mobility, conduction & valence band energy, and subthreshold swing is reported. All these parameters are analyzed and compared with bulk GaN FinFET and Si FinFET. We achieve better ON current, faster speed, and more minor subthreshold swing, reducing the short channel effects. A shallow OFF current is obtained because of bulk conduction in the GaN channel area, which the gate can deplete. Several RF/analog metrics are also noted, including transconductance (g<sub>m</sub>), cut-off frequency (f<sub>T</sub>), transconductance frequency product (TFP), and transconductance generation factor (TGF), and comparison with Bulk GaN FinFET and Si FinFET is presented. Finally, the linearity metrics like 2nd and 3rd-order voltage intercept points, IIP3, and 1-dB compression point is extracted. Compared to the other two structures, the suggested structure exhibits advantageous DC and RF/analog performances. A comparison of different Figures of Merits (FoMs) for the suggested device with previously published literature is also given.</p></div>","PeriodicalId":100915,"journal":{"name":"Memories - Materials, Devices, Circuits and Systems","volume":"5 ","pages":"Article 100079"},"PeriodicalIF":0.0000,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Impact on DC and analog/RF performances of SOI based GaN FinFET considering high-k gate oxide\",\"authors\":\"Vandana Singh Rajawat , Ajay Kumar , Bharat Choudhary\",\"doi\":\"10.1016/j.memori.2023.100079\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>This paper suggests an analysis of SOI-based GaN FinFET that considers high-k gate oxide into account. The effect of using SOI substrate and a high-k dielectric layer on ON current, OFF current, electric field, electron mobility, conduction & valence band energy, and subthreshold swing is reported. All these parameters are analyzed and compared with bulk GaN FinFET and Si FinFET. We achieve better ON current, faster speed, and more minor subthreshold swing, reducing the short channel effects. A shallow OFF current is obtained because of bulk conduction in the GaN channel area, which the gate can deplete. Several RF/analog metrics are also noted, including transconductance (g<sub>m</sub>), cut-off frequency (f<sub>T</sub>), transconductance frequency product (TFP), and transconductance generation factor (TGF), and comparison with Bulk GaN FinFET and Si FinFET is presented. Finally, the linearity metrics like 2nd and 3rd-order voltage intercept points, IIP3, and 1-dB compression point is extracted. Compared to the other two structures, the suggested structure exhibits advantageous DC and RF/analog performances. A comparison of different Figures of Merits (FoMs) for the suggested device with previously published literature is also given.</p></div>\",\"PeriodicalId\":100915,\"journal\":{\"name\":\"Memories - Materials, Devices, Circuits and Systems\",\"volume\":\"5 \",\"pages\":\"Article 100079\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Memories - Materials, Devices, Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S2773064623000567\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Memories - Materials, Devices, Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S2773064623000567","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0
摘要
本文提出了一种考虑高k栅极氧化物的SOI基GaN FinFET的分析方法。研究了SOI衬底和高介电常数介电层对导通电流、截止电流、电场、电子迁移率、导通特性的影响;价带能量和亚阈值摆动。对所有这些参数进行了分析,并与体GaN FinFET和Si FinFET进行了比较。我们实现了更好的ON电流、更快的速度和更小的亚阈值摆动,减少了短通道效应。由于栅极可能耗尽的GaN沟道区域中的体导电,获得了浅截止电流。还注意到几个RF/模拟度量,包括跨导(gm)、截止频率(fT)、跨导频率乘积(TFP)和跨导生成因子(TGF),并与Bulk GaN FinFET和Si FinFET进行了比较。最后,提取线性度量,如二阶和三阶电压截点、IIP3和1-dB压缩点。与其他两种结构相比,所提出的结构表现出有利的DC和RF/模拟性能。还将建议装置的不同优缺点(FoM)与先前发表的文献进行了比较。
Impact on DC and analog/RF performances of SOI based GaN FinFET considering high-k gate oxide
This paper suggests an analysis of SOI-based GaN FinFET that considers high-k gate oxide into account. The effect of using SOI substrate and a high-k dielectric layer on ON current, OFF current, electric field, electron mobility, conduction & valence band energy, and subthreshold swing is reported. All these parameters are analyzed and compared with bulk GaN FinFET and Si FinFET. We achieve better ON current, faster speed, and more minor subthreshold swing, reducing the short channel effects. A shallow OFF current is obtained because of bulk conduction in the GaN channel area, which the gate can deplete. Several RF/analog metrics are also noted, including transconductance (gm), cut-off frequency (fT), transconductance frequency product (TFP), and transconductance generation factor (TGF), and comparison with Bulk GaN FinFET and Si FinFET is presented. Finally, the linearity metrics like 2nd and 3rd-order voltage intercept points, IIP3, and 1-dB compression point is extracted. Compared to the other two structures, the suggested structure exhibits advantageous DC and RF/analog performances. A comparison of different Figures of Merits (FoMs) for the suggested device with previously published literature is also given.