Rishabh Sharma , Debabrata Mondal , Ambika Prasad Shah
{"title":"用于空间应用的具有改进写入能力的辐射硬化12T SRAM单元","authors":"Rishabh Sharma , Debabrata Mondal , Ambika Prasad Shah","doi":"10.1016/j.memori.2023.100071","DOIUrl":null,"url":null,"abstract":"<div><p>This paper presents an inventive and extremely dependable radiation-hardened by-design (RHBD) 12T SRAM Cell with enhanced writing capability (RHWC-12T) for a space radiation environment. The Proposed RHWC-12T SRAM is designed on Cadence Virtuoso with quad-storage nodes and simulated in 45-nm CMOS technology with the supply voltage of 1.1 V and 27<span><math><msup><mrow></mrow><mrow><mo>∘</mo></mrow></msup></math></span>C operating temperature. The proposed cell is tolerant to both 0 to 1 and 1 to 0 SEUs (Single event upsets). Also, it provides better speed and stability compared to the other considered SRAM cells such as 6T, 10T Dohar, Quatro, We-Quatro, QUCCE-12T, and NQuatro. According to simulation findings, the proposed SRAM cell provides 1.053<span><math><mo>×</mo></math></span> better writing stability than the 10T Dohar SRAM cell. In addition, the write access time improves by 3.56<span><math><mo>×</mo></math></span> with 1.36<span><math><mo>×</mo></math></span> area overhead than 10T Dohar SRAM cell.</p></div>","PeriodicalId":100915,"journal":{"name":"Memories - Materials, Devices, Circuits and Systems","volume":"5 ","pages":"Article 100071"},"PeriodicalIF":0.0000,"publicationDate":"2023-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"Radiation hardened 12T SRAM cell with improved writing capability for space applications\",\"authors\":\"Rishabh Sharma , Debabrata Mondal , Ambika Prasad Shah\",\"doi\":\"10.1016/j.memori.2023.100071\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>This paper presents an inventive and extremely dependable radiation-hardened by-design (RHBD) 12T SRAM Cell with enhanced writing capability (RHWC-12T) for a space radiation environment. The Proposed RHWC-12T SRAM is designed on Cadence Virtuoso with quad-storage nodes and simulated in 45-nm CMOS technology with the supply voltage of 1.1 V and 27<span><math><msup><mrow></mrow><mrow><mo>∘</mo></mrow></msup></math></span>C operating temperature. The proposed cell is tolerant to both 0 to 1 and 1 to 0 SEUs (Single event upsets). Also, it provides better speed and stability compared to the other considered SRAM cells such as 6T, 10T Dohar, Quatro, We-Quatro, QUCCE-12T, and NQuatro. According to simulation findings, the proposed SRAM cell provides 1.053<span><math><mo>×</mo></math></span> better writing stability than the 10T Dohar SRAM cell. In addition, the write access time improves by 3.56<span><math><mo>×</mo></math></span> with 1.36<span><math><mo>×</mo></math></span> area overhead than 10T Dohar SRAM cell.</p></div>\",\"PeriodicalId\":100915,\"journal\":{\"name\":\"Memories - Materials, Devices, Circuits and Systems\",\"volume\":\"5 \",\"pages\":\"Article 100071\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Memories - Materials, Devices, Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S2773064623000488\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Memories - Materials, Devices, Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S2773064623000488","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Radiation hardened 12T SRAM cell with improved writing capability for space applications
This paper presents an inventive and extremely dependable radiation-hardened by-design (RHBD) 12T SRAM Cell with enhanced writing capability (RHWC-12T) for a space radiation environment. The Proposed RHWC-12T SRAM is designed on Cadence Virtuoso with quad-storage nodes and simulated in 45-nm CMOS technology with the supply voltage of 1.1 V and 27C operating temperature. The proposed cell is tolerant to both 0 to 1 and 1 to 0 SEUs (Single event upsets). Also, it provides better speed and stability compared to the other considered SRAM cells such as 6T, 10T Dohar, Quatro, We-Quatro, QUCCE-12T, and NQuatro. According to simulation findings, the proposed SRAM cell provides 1.053 better writing stability than the 10T Dohar SRAM cell. In addition, the write access time improves by 3.56 with 1.36 area overhead than 10T Dohar SRAM cell.