{"title":"用于存储电路应用的无连接双栅沟槽沟道（JL-TGTC）MOSFET的数字逻辑评估","authors":"Ajay Kumar , Neha Gupta , Aditya Jain , Rajeev Gupta , Bharat Choudhary , Kaushal Kumar , Amit Kumar Goyal , Yehia Massoud","doi":"10.1016/j.memori.2023.100087","DOIUrl":null,"url":null,"abstract":"<div><p>In this paper, Junctionless Twin Gate Trench Channel (JL-TGTC) MOSFET with individual gate control is realized. The device gives full functionality of 2-input digital ‘AND’ and ‘NAND’ logics. The simulation depicts the results in the form of various parameters such as cutoff current, transfer characteristics, and potential profiles. All the simulations regarding device structure and functionality are done on TCAD. This new type of MOS device has improved applicability in low-voltage digital electronics such as sequential circuits etc.</p></div>","PeriodicalId":100915,"journal":{"name":"Memories - Materials, Devices, Circuits and Systems","volume":"6 ","pages":"Article 100087"},"PeriodicalIF":0.0000,"publicationDate":"2023-10-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Digital-logic assessment of junctionless twin gate trench channel (JL-TGTC) MOSFET for memory circuit applications\",\"authors\":\"Ajay Kumar , Neha Gupta , Aditya Jain , Rajeev Gupta , Bharat Choudhary , Kaushal Kumar , Amit Kumar Goyal , Yehia Massoud\",\"doi\":\"10.1016/j.memori.2023.100087\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"<div><p>In this paper, Junctionless Twin Gate Trench Channel (JL-TGTC) MOSFET with individual gate control is realized. The device gives full functionality of 2-input digital ‘AND’ and ‘NAND’ logics. The simulation depicts the results in the form of various parameters such as cutoff current, transfer characteristics, and potential profiles. All the simulations regarding device structure and functionality are done on TCAD. This new type of MOS device has improved applicability in low-voltage digital electronics such as sequential circuits etc.</p></div>\",\"PeriodicalId\":100915,\"journal\":{\"name\":\"Memories - Materials, Devices, Circuits and Systems\",\"volume\":\"6 \",\"pages\":\"Article 100087\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2023-10-11\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Memories - Materials, Devices, Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://www.sciencedirect.com/science/article/pii/S2773064623000646\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Memories - Materials, Devices, Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S2773064623000646","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Digital-logic assessment of junctionless twin gate trench channel (JL-TGTC) MOSFET for memory circuit applications
In this paper, Junctionless Twin Gate Trench Channel (JL-TGTC) MOSFET with individual gate control is realized. The device gives full functionality of 2-input digital ‘AND’ and ‘NAND’ logics. The simulation depicts the results in the form of various parameters such as cutoff current, transfer characteristics, and potential profiles. All the simulations regarding device structure and functionality are done on TCAD. This new type of MOS device has improved applicability in low-voltage digital electronics such as sequential circuits etc.
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