基于频域终端响应的长互连延迟宏建模

A. Chinea, Student Member Ieee Piero Triverio, Senior Member Ieee Stefano Grivet-Talocia
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引用次数: 51

摘要

我们提出了一种鲁棒和有效的方案,用于从频域表化响应生成基于延迟的宏模型。这些响应可以来自模拟或直接测量。主要算法是基于迭代加权最小二乘过程来识别延迟有理逼近。如果在迭代过程中进行极点重新定位,则该方案可以解释为将众所周知的向量拟合算法推广到延迟系统。因此,我们将该算法称为延迟向量拟合(DVF)。在不进行极点重定位的情况下,该方案推广了所谓的Sanathanan-Koerner迭代,称为延迟Sanathanan-Koerner算法。这些技术产生紧凑的宏模型,易于在spice兼容的等效电路中合成,包括延迟源或理想的传输线元件。这些宏观模型在模拟时间方面优于经典的理性宏观模型。几个例子说明了所提出的方法的优点。
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Delay-Based Macromodeling of Long Interconnects From Frequency-Domain Terminal Responses
We present a robust and efficient scheme for the generation of delay-based macromodels from frequency-domain tabulated responses. These responses can come from both simulation or direct measurement. The main algorithm is based on an iterative weighted least-squares process for the identification of delayed rational approximations. In case that pole relocation is performed during the iterations, the scheme can be interpreted as a generalization of the well-known vector fitting algorithm to delayed systems. Therefore, we denote this algorithm as delayed vector fitting (DVF). In case no pole relocation is performed, the scheme generalizes the so-called Sanathanan-Koerner iteration, calling for the denomination of delayed Sanathanan-Koerner algorithm. These techniques produce compact macromodels that are readily synthesized in SPICE-compatible equivalent circuits including delayed sources or ideal transmission line elements. These macromodels outperform classical rational macromodels in terms of simulation time. Several examples illustrate the advantages of proposed methodology.
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来源期刊
IEEE Transactions on Advanced Packaging
IEEE Transactions on Advanced Packaging 工程技术-材料科学:综合
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审稿时长
6 months
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